blob: 29399bcd8b6866cdc67cd398944f57fc3af0fd39 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Aneesh Bansal4b636c32016-01-22 17:05:59 +05302/*
3 * FSL PAMU driver
4 *
5 * Copyright 2012-2016 Freescale Semiconductor, Inc.
Aneesh Bansal4b636c32016-01-22 17:05:59 +05306 */
7
Tom Rinidee15a92024-04-30 20:40:48 -06008#include <config.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060010#include <linux/bitops.h>
Aneesh Bansal4b636c32016-01-22 17:05:59 +053011#include <linux/log2.h>
12#include <malloc.h>
13#include <asm/fsl_pamu.h>
Tom Rinidee15a92024-04-30 20:40:48 -060014#include <asm/io.h>
15#include <asm/ppc.h>
Aneesh Bansal4b636c32016-01-22 17:05:59 +053016
17struct paace *ppaact;
18struct paace *sec;
19unsigned long fspi;
20
21static inline int __ilog2_roundup_64(uint64_t val)
22{
23 if ((val & (val - 1)) == 0)
24 return __ilog2_u64(val);
25 else
26 return __ilog2_u64(val) + 1;
27}
28
29
30static inline int count_lsb_zeroes(unsigned long val)
31{
32 return ffs(val) - 1;
33}
34
35static unsigned int map_addrspace_size_to_wse(uint64_t addrspace_size)
36{
37 /* window size is 2^(WSE+1) bytes */
38 return count_lsb_zeroes(addrspace_size >> PAMU_PAGE_SHIFT) +
39 PAMU_PAGE_SHIFT - 1;
40}
41
42static unsigned int map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)
43{
44 /* window count is 2^(WCE+1) bytes */
45 return count_lsb_zeroes(subwindow_cnt) - 1;
46}
47
48static void pamu_setup_default_xfer_to_host_ppaace(struct paace *ppaace)
49{
50 set_bf(ppaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_PRIMARY);
51 set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
52 PAACE_M_COHERENCE_REQ);
53}
54
55static void pamu_setup_default_xfer_to_host_spaace(struct paace *spaace)
56{
57 set_bf(spaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_SECONDARY);
58 set_bf(spaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
59 PAACE_M_COHERENCE_REQ);
60}
61
62/** Sets up PPAACE entry for specified liodn
63 *
64 * @param[in] liodn Logical IO device number
65 * @param[in] win_addr starting address of DSA window
66 * @param[in] win-size size of DSA window
67 * @param[in] omi Operation mapping index -- if ~omi == 0 then omi
68 not defined
69 * @param[in] stashid cache stash id for associated cpu -- if ~stashid == 0
70 then stashid not defined
71 * @param[in] snoopid snoop id for hardware coherency -- if ~snoopid == 0
72 then snoopid not defined
73 * @param[in] subwin_cnt number of sub-windows
74 *
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010075 * Return: Returns 0 upon success else error code < 0 returned
Aneesh Bansal4b636c32016-01-22 17:05:59 +053076 */
77static int pamu_config_ppaace(uint32_t liodn, uint64_t win_addr,
78 uint64_t win_size, uint32_t omi,
79 uint32_t snoopid, uint32_t stashid,
80 uint32_t subwin_cnt)
81{
82 struct paace *ppaace;
83
84 if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE)
85 return -1;
86
87 if (win_addr & (win_size - 1))
88 return -2;
89
90 if (liodn > NUM_PPAACT_ENTRIES) {
91 printf("Entries in PPACT not sufficient\n");
92 return -3;
93 }
94
95 ppaace = &ppaact[liodn];
96
97 /* window size is 2^(WSE+1) bytes */
98 set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE,
99 map_addrspace_size_to_wse(win_size));
100
101 pamu_setup_default_xfer_to_host_ppaace(ppaace);
102
103 if (sizeof(phys_addr_t) > 4)
104 ppaace->wbah = (u64)win_addr >> (PAMU_PAGE_SHIFT + 20);
105 else
106 ppaace->wbah = 0;
107
108 set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL,
109 (win_addr >> PAMU_PAGE_SHIFT));
110
111 /* set up operation mapping if it's configured */
112 if (omi < OME_NUMBER_ENTRIES) {
113 set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED);
114 ppaace->op_encode.index_ot.omi = omi;
115 } else if (~omi != 0) {
116 return -3;
117 }
118
119 /* configure stash id */
120 if (~stashid != 0)
121 set_bf(ppaace->impl_attr, PAACE_IA_CID, stashid);
122
123 /* configure snoop id */
124 if (~snoopid != 0)
125 ppaace->domain_attr.to_host.snpid = snoopid;
126
127 if (subwin_cnt) {
128 /* window count is 2^(WCE+1) bytes */
129 set_bf(ppaace->impl_attr, PAACE_IA_WCE,
130 map_subwindow_cnt_to_wce(subwin_cnt));
131 set_bf(ppaace->addr_bitfields, PPAACE_AF_MW, 0x1);
132 ppaace->fspi = fspi;
133 fspi = fspi + DEFAULT_NUM_SUBWINDOWS - 1;
134 } else {
135 set_bf(ppaace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
136 }
137
Mario Sixc463b6d2019-01-21 09:18:21 +0100138 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530139 /* Mark the ppace entry valid */
140 ppaace->addr_bitfields |= PAACE_V_VALID;
Mario Sixc463b6d2019-01-21 09:18:21 +0100141 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530142
143 return 0;
144}
145
146static int pamu_config_spaace(uint32_t liodn,
147 uint64_t subwin_size, uint64_t subwin_addr, uint64_t size,
148 uint32_t omi, uint32_t snoopid, uint32_t stashid)
149{
150 struct paace *paace;
151 /* Align start addr of subwin to subwindoe size */
152 uint64_t sec_addr = subwin_addr & ~(subwin_size - 1);
153 uint64_t end_addr = subwin_addr + size;
154 int size_shift = __ilog2_u64(subwin_size);
155 uint64_t win_size = 0;
156 uint32_t index, swse;
157 unsigned long fspi_idx;
158
159 /* Recalculate the size */
160 size = end_addr - sec_addr;
161
162 if (!subwin_size)
163 return -1;
164
165 if (liodn > NUM_PPAACT_ENTRIES) {
166 printf("LIODN No programmed %d > no. of PPAACT entries %d\n",
167 liodn, NUM_PPAACT_ENTRIES);
168 return -1;
169 }
170
171 while (sec_addr < end_addr) {
172 debug("sec_addr < end_addr is %llx < %llx\n", sec_addr,
173 end_addr);
174 paace = &ppaact[liodn];
175 if (!paace)
176 return -1;
177 fspi_idx = paace->fspi;
178
179 /* Calculating the win_size here as if we map in index 0,
180 paace entry woudl need to be programmed for SWSE */
181 win_size = end_addr - sec_addr;
182 win_size = 1 << __ilog2_roundup_64(win_size);
183
184 if (win_size > subwin_size)
185 win_size = subwin_size;
186 else if (win_size < PAMU_PAGE_SIZE)
187 win_size = PAMU_PAGE_SIZE;
188
189 debug("win_size is %llx\n", win_size);
190
191 swse = map_addrspace_size_to_wse(win_size);
192 index = sec_addr >> size_shift;
193
194 if (index == 0) {
195 set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
196 set_bf(paace->addr_bitfields, PAACE_AF_AP,
197 PAACE_AP_PERMS_ALL);
198 sec_addr += subwin_size;
199 continue;
200 }
201
202 paace = sec + fspi_idx + index - 1;
203
204 debug("SPAACT:Writing at location %p, index %d\n", paace,
205 index);
206
207 pamu_setup_default_xfer_to_host_spaace(paace);
208 set_bf(paace->addr_bitfields, SPAACE_AF_LIODN, liodn);
209 set_bf(paace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
210
211 /* configure snoop id */
212 if (~snoopid != 0)
213 paace->domain_attr.to_host.snpid = snoopid;
214
215 if (paace->addr_bitfields & PAACE_V_VALID) {
216 debug("Reached overlap condition\n");
217 debug("%d < %d\n", get_bf(paace->win_bitfields,
218 PAACE_WIN_SWSE), swse);
219 if (get_bf(paace->win_bitfields, PAACE_WIN_SWSE) < swse)
220 set_bf(paace->win_bitfields, PAACE_WIN_SWSE,
221 swse);
222 } else {
223 set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
224 }
225
226 paace->addr_bitfields |= PAACE_V_VALID;
227 sec_addr += subwin_size;
228 }
229
230 return 0;
231}
232
233int pamu_init(void)
234{
Tom Rini6a5dccc2022-11-16 13:10:41 -0500235 u32 base_addr = CFG_SYS_PAMU_ADDR;
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530236 struct ccsr_pamu *regs;
237 u32 i = 0;
238 u64 ppaact_phys, ppaact_lim, ppaact_size;
239 u64 spaact_phys, spaact_lim, spaact_size;
240
241 ppaact_size = sizeof(struct paace) * NUM_PPAACT_ENTRIES;
242 spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES;
243
244 /* Allocate space for Primary PAACT Table */
Tom Rini364d0022023-01-10 11:19:45 -0500245#if (defined(CONFIG_SPL_BUILD) && defined(CFG_SPL_PPAACT_ADDR))
246 ppaact = (void *)CFG_SPL_PPAACT_ADDR;
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400247#else
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530248 ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size);
249 if (!ppaact)
250 return -1;
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400251#endif
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530252 memset(ppaact, 0, ppaact_size);
253
254 /* Allocate space for Secondary PAACT Table */
Tom Rini364d0022023-01-10 11:19:45 -0500255#if (defined(CONFIG_SPL_BUILD) && defined(CFG_SPL_SPAACT_ADDR))
256 sec = (void *)CFG_SPL_SPAACT_ADDR;
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400257#else
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530258 sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size);
259 if (!sec)
260 return -1;
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400261#endif
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530262 memset(sec, 0, spaact_size);
263
264 ppaact_phys = virt_to_phys((void *)ppaact);
265 ppaact_lim = ppaact_phys + ppaact_size;
266
267 spaact_phys = (uint64_t)virt_to_phys((void *)sec);
268 spaact_lim = spaact_phys + spaact_size;
269
270 /* Configure all PAMU's */
Tom Rini364d0022023-01-10 11:19:45 -0500271 for (i = 0; i < CFG_NUM_PAMU; i++) {
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530272 regs = (struct ccsr_pamu *)base_addr;
273
274 out_be32(&regs->ppbah, ppaact_phys >> 32);
275 out_be32(&regs->ppbal, (uint32_t)ppaact_phys);
276
277 out_be32(&regs->pplah, (ppaact_lim) >> 32);
278 out_be32(&regs->pplal, (uint32_t)ppaact_lim);
279
280 if (sec != NULL) {
281 out_be32(&regs->spbah, spaact_phys >> 32);
282 out_be32(&regs->spbal, (uint32_t)spaact_phys);
283 out_be32(&regs->splah, spaact_lim >> 32);
284 out_be32(&regs->splal, (uint32_t)spaact_lim);
285 }
Mario Sixc463b6d2019-01-21 09:18:21 +0100286 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530287
288 base_addr += PAMU_OFFSET;
289 }
290
291 return 0;
292}
293
294void pamu_enable(void)
295{
296 u32 i = 0;
Tom Rini6a5dccc2022-11-16 13:10:41 -0500297 u32 base_addr = CFG_SYS_PAMU_ADDR;
Tom Rini364d0022023-01-10 11:19:45 -0500298 for (i = 0; i < CFG_NUM_PAMU; i++) {
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530299 setbits_be32((void *)base_addr + PAMU_PCR_OFFSET,
300 PAMU_PCR_PE);
Mario Sixc463b6d2019-01-21 09:18:21 +0100301 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530302 base_addr += PAMU_OFFSET;
303 }
304}
305
306void pamu_reset(void)
307{
308 u32 i = 0;
Tom Rini6a5dccc2022-11-16 13:10:41 -0500309 u32 base_addr = CFG_SYS_PAMU_ADDR;
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530310 struct ccsr_pamu *regs;
311
Tom Rini364d0022023-01-10 11:19:45 -0500312 for (i = 0; i < CFG_NUM_PAMU; i++) {
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530313 regs = (struct ccsr_pamu *)base_addr;
314 /* Clear PPAACT Base register */
315 out_be32(&regs->ppbah, 0);
316 out_be32(&regs->ppbal, 0);
317 out_be32(&regs->pplah, 0);
318 out_be32(&regs->pplal, 0);
319 out_be32(&regs->spbah, 0);
320 out_be32(&regs->spbal, 0);
321 out_be32(&regs->splah, 0);
322 out_be32(&regs->splal, 0);
323
324 clrbits_be32((void *)regs + PAMU_PCR_OFFSET, PAMU_PCR_PE);
Mario Sixc463b6d2019-01-21 09:18:21 +0100325 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530326 base_addr += PAMU_OFFSET;
327 }
328}
329
330void pamu_disable(void)
331{
332 u32 i = 0;
Tom Rini6a5dccc2022-11-16 13:10:41 -0500333 u32 base_addr = CFG_SYS_PAMU_ADDR;
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530334
335
Tom Rini364d0022023-01-10 11:19:45 -0500336 for (i = 0; i < CFG_NUM_PAMU; i++) {
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530337 clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
Mario Sixc463b6d2019-01-21 09:18:21 +0100338 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530339 base_addr += PAMU_OFFSET;
340 }
341}
342
343
344static uint64_t find_max(uint64_t arr[], int num)
345{
346 int i = 0;
347 int max = 0;
348 for (i = 1 ; i < num; i++)
349 if (arr[max] < arr[i])
350 max = i;
351
352 return arr[max];
353}
354
355static uint64_t find_min(uint64_t arr[], int num)
356{
357 int i = 0;
358 int min = 0;
359 for (i = 1 ; i < num; i++)
360 if (arr[min] > arr[i])
361 min = i;
362
363 return arr[min];
364}
365
366static uint32_t get_win_cnt(uint64_t size)
367{
368 uint32_t win_cnt = DEFAULT_NUM_SUBWINDOWS;
369
370 while (win_cnt && (size/win_cnt) < PAMU_PAGE_SIZE)
371 win_cnt >>= 1;
372
373 return win_cnt;
374}
375
376int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn)
377{
378 int i = 0;
379 int ret = 0;
380 uint32_t num_sec_windows = 0;
381 uint32_t num_windows = 0;
382 uint64_t min_addr, max_addr;
383 uint64_t size;
384 uint64_t subwin_size;
385 int sizebit;
386
387 min_addr = find_min(tbl->start_addr, num_entries);
388 max_addr = find_max(tbl->end_addr, num_entries);
389 size = max_addr - min_addr + 1;
390
391 if (!size)
392 return -1;
393
394 sizebit = __ilog2_roundup_64(size);
Priyanka Jain6275f002021-02-05 14:01:11 +0530395 size = 1ull << sizebit;
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530396 debug("min start_addr is %llx\n", min_addr);
397 debug("max end_addr is %llx\n", max_addr);
398 debug("size found is %llx\n", size);
399
400 if (size < PAMU_PAGE_SIZE)
401 size = PAMU_PAGE_SIZE;
402
403 while (1) {
404 min_addr = min_addr & ~(size - 1);
405 if (min_addr + size > max_addr)
406 break;
407 size <<= 1;
408 if (!size)
409 return -1;
410 }
411 debug("PAACT :Base addr is %llx\n", min_addr);
412 debug("PAACT : Size is %llx\n", size);
413 num_windows = get_win_cnt(size);
414 /* For a single window, no spaact entries are required
415 * sec_sub_window count = 0 */
416 if (num_windows > 1)
417 num_sec_windows = num_windows;
418 else
419 num_sec_windows = 0;
420
421 ret = pamu_config_ppaace(liodn, min_addr,
422 size , -1, -1, -1, num_sec_windows);
423
424 if (ret < 0)
425 return ret;
426
427 debug("configured ppace\n");
428
429 if (num_sec_windows) {
430 subwin_size = size >> count_lsb_zeroes(num_sec_windows);
431 debug("subwin_size is %llx\n", subwin_size);
432
433 for (i = 0; i < num_entries; i++) {
434 ret = pamu_config_spaace(liodn,
435 subwin_size, tbl->start_addr[i] - min_addr,
436 tbl->size[i], -1, -1, -1);
437
438 if (ret < 0)
439 return ret;
440 }
441 }
442
443 return ret;
444}