Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | f35484d | 2014-09-22 17:30:57 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2014 Google, Inc |
Simon Glass | f35484d | 2014-09-22 17:30:57 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __serial_pl01x_h |
| 7 | #define __serial_pl01x_h |
| 8 | |
| 9 | enum pl01x_type { |
| 10 | TYPE_PL010, |
| 11 | TYPE_PL011, |
| 12 | }; |
| 13 | |
| 14 | /* |
| 15 | *Information about a serial port |
| 16 | * |
| 17 | * @base: Register base address |
| 18 | * @type: Port type |
| 19 | * @clock: Input clock rate, used for calculating the baud rate divisor |
Eric Anholt | be5a7dd | 2016-03-13 18:16:54 -0700 | [diff] [blame] | 20 | * @skip_init: Don't attempt to change port configuration (also means @clock |
| 21 | * is ignored) |
Simon Glass | f35484d | 2014-09-22 17:30:57 -0600 | [diff] [blame] | 22 | */ |
Lukasz Majewski | 58aec3f | 2023-05-19 12:43:52 +0200 | [diff] [blame] | 23 | #include <dt-structs.h> |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 24 | struct pl01x_serial_plat { |
Lukasz Majewski | 58aec3f | 2023-05-19 12:43:52 +0200 | [diff] [blame] | 25 | #if CONFIG_IS_ENABLED(OF_PLATDATA) |
| 26 | struct dtd_serial_pl01x dtplat; |
| 27 | #endif |
Simon Glass | f35484d | 2014-09-22 17:30:57 -0600 | [diff] [blame] | 28 | unsigned long base; |
| 29 | enum pl01x_type type; |
| 30 | unsigned int clock; |
Eric Anholt | be5a7dd | 2016-03-13 18:16:54 -0700 | [diff] [blame] | 31 | bool skip_init; |
Simon Glass | f35484d | 2014-09-22 17:30:57 -0600 | [diff] [blame] | 32 | }; |
| 33 | |
| 34 | #endif |