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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tim Harvey4b00fcd2014-02-12 23:48:12 -08002/*
3 * Copyright (C) 2014 Gateworks Corporation
4 * Tim Harvey <tharvey@gateworks.com>
Tim Harvey4b00fcd2014-02-12 23:48:12 -08005 */
6
7#ifndef __PFUZE100_PMIC_H_
8#define __PFUZE100_PMIC_H_
9
Peng Fan6f4f6d22015-08-14 11:36:16 +020010/* Device ID */
11enum {PFUZE100 = 0x10, PFUZE200 = 0x11, PFUZE3000 = 0x30};
12
13#define PFUZE100_REGULATOR_DRIVER "pfuze100_regulator"
14
Tim Harvey4b00fcd2014-02-12 23:48:12 -080015/* PFUZE100 registers */
16enum {
17 PFUZE100_DEVICEID = 0x00,
18 PFUZE100_REVID = 0x03,
19 PFUZE100_FABID = 0x04,
20
21 PFUZE100_SW1ABVOL = 0x20,
Fabio Estevamba92ad62014-05-09 13:15:42 -030022 PFUZE100_SW1ABSTBY = 0x21,
Peng Fan9d06a102015-01-08 21:00:36 +080023 PFUZE100_SW1ABOFF = 0x22,
24 PFUZE100_SW1ABMODE = 0x23,
Peng Fan5f234e72015-05-18 13:37:26 +080025 PFUZE100_SW1ABCONF = 0x24,
Tim Harvey4b00fcd2014-02-12 23:48:12 -080026 PFUZE100_SW1CVOL = 0x2e,
Fabio Estevamba92ad62014-05-09 13:15:42 -030027 PFUZE100_SW1CSTBY = 0x2f,
Peng Fan9d06a102015-01-08 21:00:36 +080028 PFUZE100_SW1COFF = 0x30,
29 PFUZE100_SW1CMODE = 0x31,
Fabio Estevamba92ad62014-05-09 13:15:42 -030030 PFUZE100_SW1CCONF = 0x32,
Tim Harvey4b00fcd2014-02-12 23:48:12 -080031 PFUZE100_SW2VOL = 0x35,
Peng Fan9d06a102015-01-08 21:00:36 +080032 PFUZE100_SW2STBY = 0x36,
33 PFUZE100_SW2OFF = 0x37,
34 PFUZE100_SW2MODE = 0x38,
35 PFUZE100_SW2CONF = 0x39,
Tim Harvey4b00fcd2014-02-12 23:48:12 -080036 PFUZE100_SW3AVOL = 0x3c,
Peng Fan9d06a102015-01-08 21:00:36 +080037 PFUZE100_SW3ASTBY = 0x3D,
38 PFUZE100_SW3AOFF = 0x3E,
39 PFUZE100_SW3AMODE = 0x3F,
40 PFUZE100_SW3ACONF = 0x40,
Tim Harvey4b00fcd2014-02-12 23:48:12 -080041 PFUZE100_SW3BVOL = 0x43,
Peng Fan9d06a102015-01-08 21:00:36 +080042 PFUZE100_SW3BSTBY = 0x44,
43 PFUZE100_SW3BOFF = 0x45,
44 PFUZE100_SW3BMODE = 0x46,
45 PFUZE100_SW3BCONF = 0x47,
Tim Harvey4b00fcd2014-02-12 23:48:12 -080046 PFUZE100_SW4VOL = 0x4a,
Peng Fan9d06a102015-01-08 21:00:36 +080047 PFUZE100_SW4STBY = 0x4b,
48 PFUZE100_SW4OFF = 0x4c,
49 PFUZE100_SW4MODE = 0x4d,
50 PFUZE100_SW4CONF = 0x4e,
Tim Harvey4b00fcd2014-02-12 23:48:12 -080051 PFUZE100_SWBSTCON1 = 0x66,
52 PFUZE100_VREFDDRCON = 0x6a,
53 PFUZE100_VSNVSVOL = 0x6b,
54 PFUZE100_VGEN1VOL = 0x6c,
55 PFUZE100_VGEN2VOL = 0x6d,
56 PFUZE100_VGEN3VOL = 0x6e,
57 PFUZE100_VGEN4VOL = 0x6f,
58 PFUZE100_VGEN5VOL = 0x70,
59 PFUZE100_VGEN6VOL = 0x71,
60
Peng Fan6f4f6d22015-08-14 11:36:16 +020061 PFUZE100_NUM_OF_REGS = 0x7f,
Tim Harvey4b00fcd2014-02-12 23:48:12 -080062};
63
Peng Fan54ee6a42015-08-07 16:43:45 +080064/* Registor offset based on VOLT register */
65#define PFUZE100_VOL_OFFSET 0
66#define PFUZE100_STBY_OFFSET 1
67#define PFUZE100_OFF_OFFSET 2
68#define PFUZE100_MODE_OFFSET 3
69#define PFUZE100_CONF_OFFSET 4
70
Tim Harvey4b00fcd2014-02-12 23:48:12 -080071/*
Ye.Li2c4b7322014-11-06 16:28:58 +080072 * Buck Regulators
73 */
74
Peng Fancc8bae52015-01-09 16:59:41 +080075#define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250)
76
Ye.Li2c4b7322014-11-06 16:28:58 +080077/* SW1A/B/C Output Voltage Configuration */
78#define SW1x_0_300V 0
79#define SW1x_0_325V 1
80#define SW1x_0_350V 2
81#define SW1x_0_375V 3
82#define SW1x_0_400V 4
83#define SW1x_0_425V 5
84#define SW1x_0_450V 6
85#define SW1x_0_475V 7
86#define SW1x_0_500V 8
87#define SW1x_0_525V 9
88#define SW1x_0_550V 10
89#define SW1x_0_575V 11
90#define SW1x_0_600V 12
91#define SW1x_0_625V 13
92#define SW1x_0_650V 14
93#define SW1x_0_675V 15
94#define SW1x_0_700V 16
95#define SW1x_0_725V 17
96#define SW1x_0_750V 18
97#define SW1x_0_775V 19
98#define SW1x_0_800V 20
99#define SW1x_0_825V 21
100#define SW1x_0_850V 22
101#define SW1x_0_875V 23
102#define SW1x_0_900V 24
103#define SW1x_0_925V 25
104#define SW1x_0_950V 26
105#define SW1x_0_975V 27
106#define SW1x_1_000V 28
107#define SW1x_1_025V 29
108#define SW1x_1_050V 30
109#define SW1x_1_075V 31
110#define SW1x_1_100V 32
111#define SW1x_1_125V 33
112#define SW1x_1_150V 34
113#define SW1x_1_175V 35
114#define SW1x_1_200V 36
115#define SW1x_1_225V 37
116#define SW1x_1_250V 38
117#define SW1x_1_275V 39
118#define SW1x_1_300V 40
119#define SW1x_1_325V 41
120#define SW1x_1_350V 42
121#define SW1x_1_375V 43
122#define SW1x_1_400V 44
123#define SW1x_1_425V 45
124#define SW1x_1_450V 46
125#define SW1x_1_475V 47
126#define SW1x_1_500V 48
127#define SW1x_1_525V 49
128#define SW1x_1_550V 50
129#define SW1x_1_575V 51
130#define SW1x_1_600V 52
131#define SW1x_1_625V 53
132#define SW1x_1_650V 54
133#define SW1x_1_675V 55
134#define SW1x_1_700V 56
135#define SW1x_1_725V 57
136#define SW1x_1_750V 58
137#define SW1x_1_775V 59
138#define SW1x_1_800V 60
139#define SW1x_1_825V 61
140#define SW1x_1_850V 62
141#define SW1x_1_875V 63
142
143#define SW1x_NORMAL_MASK 0x3f
144#define SW1x_STBY_MASK 0x3f
145#define SW1x_OFF_MASK 0x3f
146
Peng Fan54ee6a42015-08-07 16:43:45 +0800147#define SW_MODE_MASK 0xf
148#define SW_MODE_SHIFT 0
149
Ye.Li2c4b7322014-11-06 16:28:58 +0800150#define SW1xCONF_DVSSPEED_MASK 0xc0
151#define SW1xCONF_DVSSPEED_2US 0x00
152#define SW1xCONF_DVSSPEED_4US 0x40
153#define SW1xCONF_DVSSPEED_8US 0x80
154#define SW1xCONF_DVSSPEED_16US 0xc0
155
156/*
Tim Harvey4b00fcd2014-02-12 23:48:12 -0800157 * LDO Configuration
158 */
159
160/* VGEN1/2 Voltage Configuration */
161#define LDOA_0_80V 0
162#define LDOA_0_85V 1
163#define LDOA_0_90V 2
164#define LDOA_0_95V 3
165#define LDOA_1_00V 4
166#define LDOA_1_05V 5
167#define LDOA_1_10V 6
168#define LDOA_1_15V 7
169#define LDOA_1_20V 8
170#define LDOA_1_25V 9
171#define LDOA_1_30V 10
172#define LDOA_1_35V 11
173#define LDOA_1_40V 12
174#define LDOA_1_45V 13
175#define LDOA_1_50V 14
176#define LDOA_1_55V 15
177
178/* VGEN3/4/5/6 Voltage Configuration */
179#define LDOB_1_80V 0
180#define LDOB_1_90V 1
181#define LDOB_2_00V 2
182#define LDOB_2_10V 3
183#define LDOB_2_20V 4
184#define LDOB_2_30V 5
185#define LDOB_2_40V 6
186#define LDOB_2_50V 7
187#define LDOB_2_60V 8
188#define LDOB_2_70V 9
189#define LDOB_2_80V 10
190#define LDOB_2_90V 11
191#define LDOB_3_00V 12
192#define LDOB_3_10V 13
193#define LDOB_3_20V 14
194#define LDOB_3_30V 15
195
196#define LDO_VOL_MASK 0xf
Tim Harvey392a6b72015-04-03 16:56:16 -0700197#define LDO_EN (1 << 4)
Peng Fan54ee6a42015-08-07 16:43:45 +0800198#define LDO_MODE_SHIFT 4
199#define LDO_MODE_MASK (1 << 4)
200#define LDO_MODE_OFF 0
201#define LDO_MODE_ON 1
Tim Harvey4b00fcd2014-02-12 23:48:12 -0800202
Peng Fan54ee6a42015-08-07 16:43:45 +0800203#define VREFDDRCON_EN (1 << 4)
Tim Harvey4b00fcd2014-02-12 23:48:12 -0800204/*
205 * Boost Regulator
206 */
207
208/* SWBST Output Voltage */
209#define SWBST_5_00V 0
210#define SWBST_5_05V 1
211#define SWBST_5_10V 2
212#define SWBST_5_15V 3
213
214#define SWBST_VOL_MASK 0x3
Peng Fan418543e2015-08-07 16:43:41 +0800215#define SWBST_MODE_MASK 0xC
Peng Fan54ee6a42015-08-07 16:43:45 +0800216#define SWBST_MODE_SHIFT 0x2
217#define SWBST_MODE_OFF 0
218#define SWBST_MODE_PFM 1
219#define SWBST_MODE_AUTO 2
220#define SWBST_MODE_APS 3
Tim Harvey4b00fcd2014-02-12 23:48:12 -0800221
Peng Fan9d06a102015-01-08 21:00:36 +0800222/*
223 * Regulator Mode Control
224 *
225 * OFF: The regulator is switched off and the output voltage is discharged.
226 * PFM: In this mode, the regulator is always in PFM mode, which is useful
227 * at light loads for optimized efficiency.
228 * PWM: In this mode, the regulator is always in PWM mode operation
229 * regardless of load conditions.
230 * APS: In this mode, the regulator moves automatically between pulse
231 * skipping mode and PWM mode depending on load conditions.
232 *
233 * SWxMODE[3:0]
234 * Normal Mode | Standby Mode | value
235 * OFF OFF 0x0
236 * PWM OFF 0x1
237 * PFM OFF 0x3
238 * APS OFF 0x4
239 * PWM PWM 0x5
240 * PWM APS 0x6
241 * APS APS 0x8
242 * APS PFM 0xc
243 * PWM PFM 0xd
244 */
245#define OFF_OFF 0x0
246#define PWM_OFF 0x1
247#define PFM_OFF 0x3
248#define APS_OFF 0x4
249#define PWM_PWM 0x5
250#define PWM_APS 0x6
251#define APS_APS 0x8
252#define APS_PFM 0xc
253#define PWM_PFM 0xd
254
Stefano Babic0c880822015-02-11 12:35:46 +0100255#define SWITCH_SIZE 0x7
256
Tim Harveyb34e3d82014-04-22 21:53:56 -0700257int power_pfuze100_init(unsigned char bus);
Tim Harvey4b00fcd2014-02-12 23:48:12 -0800258#endif