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Patrick Delaunay50599142018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay06020d82018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay06020d82018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunay50599142018-07-09 15:17:19 +02008#include "stm32mp157c.dtsi"
Patrick Delaunay708cae72019-07-30 19:16:12 +02009#include "stm32mp157xaa-pinctrl.dtsi"
Patrick Delaunay06020d82018-03-12 10:46:17 +010010#include <dt-bindings/gpio/gpio.h>
Patrick Delaunay91be5942019-02-04 11:26:16 +010011#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay06020d82018-03-12 10:46:17 +010012
13/ {
Patrick Delaunay50599142018-07-09 15:17:19 +020014 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay06020d82018-03-12 10:46:17 +010015 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
16
17 chosen {
Patrice Chotard00442d02019-02-12 16:50:38 +010018 stdout-path = "serial0:115200n8";
Patrick Delaunay06020d82018-03-12 10:46:17 +010019 };
20
Patrick Delaunay50599142018-07-09 15:17:19 +020021 memory@c0000000 {
Patrick Delaunaya3705302019-07-11 11:15:28 +020022 device_type = "memory";
Patrick Delaunay06020d82018-03-12 10:46:17 +010023 reg = <0xC0000000 0x40000000>;
24 };
Patrice Chotardf6ef2292018-04-26 17:13:11 +020025
Patrick Delaunay708cae72019-07-30 19:16:12 +020026 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 ranges;
30
Patrick Delaunay8c6e6132019-11-06 16:16:33 +010031 mcuram2: mcuram2@10000000 {
32 compatible = "shared-dma-pool";
33 reg = <0x10000000 0x40000>;
34 no-map;
35 };
36
37 vdev0vring0: vdev0vring0@10040000 {
38 compatible = "shared-dma-pool";
39 reg = <0x10040000 0x1000>;
40 no-map;
41 };
42
43 vdev0vring1: vdev0vring1@10041000 {
44 compatible = "shared-dma-pool";
45 reg = <0x10041000 0x1000>;
46 no-map;
47 };
48
49 vdev0buffer: vdev0buffer@10042000 {
50 compatible = "shared-dma-pool";
51 reg = <0x10042000 0x4000>;
52 no-map;
53 };
54
55 mcuram: mcuram@30000000 {
56 compatible = "shared-dma-pool";
57 reg = <0x30000000 0x40000>;
58 no-map;
59 };
60
61 retram: retram@38000000 {
62 compatible = "shared-dma-pool";
63 reg = <0x38000000 0x10000>;
64 no-map;
65 };
66
Patrick Delaunay708cae72019-07-30 19:16:12 +020067 gpu_reserved: gpu@e8000000 {
68 reg = <0xe8000000 0x8000000>;
69 no-map;
70 };
71 };
72
Patrice Chotard00442d02019-02-12 16:50:38 +010073 aliases {
74 serial0 = &uart4;
75 };
76
Patrice Chotardf6ef2292018-04-26 17:13:11 +020077 sd_switch: regulator-sd_switch {
78 compatible = "regulator-gpio";
79 regulator-name = "sd_switch";
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <2900000>;
82 regulator-type = "voltage";
83 regulator-always-on;
84
85 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
86 gpios-states = <0>;
87 states = <1800000 0x1 2900000 0x0>;
88 };
Patrick Delaunay06020d82018-03-12 10:46:17 +010089};
90
Patrick Delaunaya3705302019-07-11 11:15:28 +020091&dts {
Patrick Delaunay06020d82018-03-12 10:46:17 +010092 status = "okay";
Patrick Delaunay06020d82018-03-12 10:46:17 +010093};
94
Patrick Delaunay708cae72019-07-30 19:16:12 +020095&gpu {
96 contiguous-area = <&gpu_reserved>;
97 status = "okay";
98};
99
Patrick Delaunay06020d82018-03-12 10:46:17 +0100100&i2c4 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&i2c4_pins_a>;
103 i2c-scl-rising-time-ns = <185>;
104 i2c-scl-falling-time-ns = <20>;
105 status = "okay";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200106 /* spare dmas for other usage */
107 /delete-property/dmas;
108 /delete-property/dma-names;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100109
Patrick Delaunaya3705302019-07-11 11:15:28 +0200110 pmic: stpmic@33 {
Patrick Delaunayd79218f2019-02-04 11:26:17 +0100111 compatible = "st,stpmic1";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100112 reg = <0x33>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200113 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100114 interrupt-controller;
115 #interrupt-cells = <2>;
116 status = "okay";
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200117
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200118 regulators {
Patrick Delaunayd79218f2019-02-04 11:26:17 +0100119 compatible = "st,stpmic1-regulators";
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200120 ldo1-supply = <&v3v3>;
121 ldo2-supply = <&v3v3>;
122 ldo3-supply = <&vdd_ddr>;
123 ldo5-supply = <&v3v3>;
124 ldo6-supply = <&v3v3>;
125 pwr_sw1-supply = <&bst_out>;
126 pwr_sw2-supply = <&bst_out>;
127
128 vddcore: buck1 {
129 regulator-name = "vddcore";
130 regulator-min-microvolt = <800000>;
131 regulator-max-microvolt = <1350000>;
132 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200133 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200134 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200135 };
136
137 vdd_ddr: buck2 {
138 regulator-name = "vdd_ddr";
139 regulator-min-microvolt = <1350000>;
140 regulator-max-microvolt = <1350000>;
141 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200142 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200143 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200144 };
145
146 vdd: buck3 {
147 regulator-name = "vdd";
148 regulator-min-microvolt = <3300000>;
149 regulator-max-microvolt = <3300000>;
150 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200151 st,mask-reset;
152 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200153 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200154 };
155
156 v3v3: buck4 {
157 regulator-name = "v3v3";
158 regulator-min-microvolt = <3300000>;
159 regulator-max-microvolt = <3300000>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200160 regulator-always-on;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200161 regulator-over-current-protection;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200162 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200163 };
164
165 vdda: ldo1 {
166 regulator-name = "vdda";
167 regulator-min-microvolt = <2900000>;
168 regulator-max-microvolt = <2900000>;
169 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200170 };
171
172 v2v8: ldo2 {
173 regulator-name = "v2v8";
174 regulator-min-microvolt = <2800000>;
175 regulator-max-microvolt = <2800000>;
176 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200177 };
178
179 vtt_ddr: ldo3 {
180 regulator-name = "vtt_ddr";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200181 regulator-min-microvolt = <500000>;
182 regulator-max-microvolt = <750000>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200183 regulator-always-on;
184 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200185 };
186
187 vdd_usb: ldo4 {
188 regulator-name = "vdd_usb";
189 regulator-min-microvolt = <3300000>;
190 regulator-max-microvolt = <3300000>;
191 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200192 };
193
194 vdd_sd: ldo5 {
195 regulator-name = "vdd_sd";
196 regulator-min-microvolt = <2900000>;
197 regulator-max-microvolt = <2900000>;
198 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200199 regulator-boot-on;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200200 };
201
202 v1v8: ldo6 {
203 regulator-name = "v1v8";
204 regulator-min-microvolt = <1800000>;
205 regulator-max-microvolt = <1800000>;
206 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200207 };
208
209 vref_ddr: vref_ddr {
210 regulator-name = "vref_ddr";
211 regulator-always-on;
212 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200213 };
214
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100215 bst_out: boost {
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200216 regulator-name = "bst_out";
217 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100218 };
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200219
220 vbus_otg: pwr_sw1 {
221 regulator-name = "vbus_otg";
222 interrupts = <IT_OCP_OTG 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200223 };
224
225 vbus_sw: pwr_sw2 {
226 regulator-name = "vbus_sw";
227 interrupts = <IT_OCP_SWOUT 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200228 regulator-active-discharge;
229 };
230 };
Patrick Delaunaya3705302019-07-11 11:15:28 +0200231
232 onkey {
233 compatible = "st,stpmic1-onkey";
234 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
235 interrupt-names = "onkey-falling", "onkey-rising";
236 power-off-time-sec = <10>;
237 status = "okay";
238 };
239
240 watchdog {
241 compatible = "st,stpmic1-wdt";
242 status = "disabled";
243 };
Patrick Delaunay06020d82018-03-12 10:46:17 +0100244 };
245};
246
Fabien Dessennec2a97d32019-05-14 11:20:37 +0200247&ipcc {
248 status = "okay";
249};
250
Patrice Chotard00442d02019-02-12 16:50:38 +0100251&iwdg2 {
252 timeout-sec = <32>;
253 status = "okay";
254};
255
Patrick Delaunay26c24b42019-08-02 15:07:18 +0200256&m4_rproc {
Patrick Delaunay8c6e6132019-11-06 16:16:33 +0100257 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
258 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunay26c24b42019-08-02 15:07:18 +0200259 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
260 mbox-names = "vq0", "vq1", "shutdown";
Patrick Delaunay8c6e6132019-11-06 16:16:33 +0100261 interrupt-parent = <&exti>;
262 interrupts = <68 1>;
Patrick Delaunay26c24b42019-08-02 15:07:18 +0200263 status = "okay";
264};
265
Patrick Delaunay50599142018-07-09 15:17:19 +0200266&pwr {
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200267 pwr-regulators {
268 vdd-supply = <&vdd>;
269 vdd_3v3_usbfs-supply = <&vdd_usb>;
270 };
Patrick Delaunay50599142018-07-09 15:17:19 +0200271};
272
Patrice Chotard00442d02019-02-12 16:50:38 +0100273&rng1 {
274 status = "okay";
275};
276
277&rtc {
278 status = "okay";
279};
280
Patrick Delaunay06020d82018-03-12 10:46:17 +0100281&sdmmc1 {
Patrick Delaunaya3705302019-07-11 11:15:28 +0200282 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100283 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200284 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
285 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100286 broken-cd;
Patrice Chotard882d72e2019-02-12 17:17:58 +0100287 st,sig-dir;
288 st,neg-edge;
289 st,use-ckin;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100290 bus-width = <4>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200291 vmmc-supply = <&vdd_sd>;
292 vqmmc-supply = <&sd_switch>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100293 status = "okay";
294};
295
Patrick Delaunay8d050102018-03-20 10:54:52 +0100296&sdmmc2 {
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100297 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay8d050102018-03-20 10:54:52 +0100298 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100299 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
300 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100301 non-removable;
302 no-sd;
303 no-sdio;
Patrice Chotard882d72e2019-02-12 17:17:58 +0100304 st,neg-edge;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100305 bus-width = <8>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200306 vmmc-supply = <&v3v3>;
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100307 vqmmc-supply = <&v3v3>;
308 mmc-ddr-3_3v;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100309 status = "okay";
310};
311
Patrice Chotard00442d02019-02-12 16:50:38 +0100312&timers6 {
313 status = "okay";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200314 /* spare dmas for other usage */
315 /delete-property/dmas;
316 /delete-property/dma-names;
Patrice Chotard00442d02019-02-12 16:50:38 +0100317 timer@5 {
318 status = "okay";
319 };
320};
321
Patrick Delaunay06020d82018-03-12 10:46:17 +0100322&uart4 {
323 pinctrl-names = "default";
324 pinctrl-0 = <&uart4_pins_a>;
325 status = "okay";
326};
Patrick Delaunay50599142018-07-09 15:17:19 +0200327
Patrick Delaunaya3705302019-07-11 11:15:28 +0200328&usbotg_hs {
329 vbus-supply = <&vbus_otg>;
330};
331
Patrick Delaunay50599142018-07-09 15:17:19 +0200332&usbphyc_port0 {
333 phy-supply = <&vdd_usb>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200334};
335
336&usbphyc_port1 {
337 phy-supply = <&vdd_usb>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200338};