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git01.mediatek.com / filogic / uboot / 2e165b5459dd62de2799a35d214e7a98b6fcd094 / . / board / amcc / sequoia / u-boot-nand.lds
blob: 07ae8b1291f7b5d55d6b46a4adba3e07996f6051 [file] [log] [blame]
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]1/*
Stefan Roesebbfcbb72006-09-12 20:19:10 +0200[diff] [blame]2 * (C) Copyright 2006
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]25SECTIONS
26{
27 /* Read-only sections, merged into text segment: */
28 . = + SIZEOF_HEADERS;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]29 .text :
30 {
31 /* WARNING - the following is hand-optimized to fit within */
32 /* the sector layout of our flash chips! XXX FIXME XXX */
33
Stefan Roese88fbf932010-04-15 16:07:28 +0200[diff] [blame]34 arch/powerpc/cpu/ppc4xx/start.o (.text)
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100[diff] [blame]35 board/amcc/sequoia/init.o (.text*)
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]36
Stefan Roesebbfcbb72006-09-12 20:19:10 +0200[diff] [blame]37 /* Align to next NAND block */
38 . = ALIGN(0x4000);
Jean-Christophe PLAGNIOL-VILLARD4436c1e2008-09-10 22:48:01 +0200[diff] [blame]39 common/env_embedded.o (.ppcenv)
Stefan Roesebbfcbb72006-09-12 20:19:10 +0200[diff] [blame]40 /* Keep some space here for redundant env and potential bad env blocks */
41 . = ALIGN(0x10000);
42
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100[diff] [blame]43 *(.text*)
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]44 }
45 _etext = .;
46 PROVIDE (etext = .);
47 .rodata :
48 {
Trent Piepho4438e5e2009-02-18 15:22:05 -0800[diff] [blame]49 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]50 }
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]51
52 /* Read-write section, merged into data segment: */
53 . = (. + 0x00FF) & 0xFFFFFF00;
54 _erotext = .;
55 PROVIDE (erotext = .);
56 .reloc :
57 {
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100[diff] [blame]58 KEEP(*(.got))
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]59 _GOT2_TABLE_ = .;
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100[diff] [blame]60 KEEP(*(.got2))
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]61 _FIXUP_TABLE_ = .;
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100[diff] [blame]62 KEEP(*(.fixup))
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]63 }
64 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
65 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
66
67 .data :
68 {
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100[diff] [blame]69 *(.data*)
70 *(.sdata*)
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]71 }
72 _edata = .;
73 PROVIDE (edata = .);
74
75 . = .;
76 __u_boot_cmd_start = .;
77 .u_boot_cmd : { *(.u_boot_cmd) }
78 __u_boot_cmd_end = .;
79
80
81 . = .;
82 __start___ex_table = .;
83 __ex_table : { *(__ex_table) }
84 __stop___ex_table = .;
85
86 . = ALIGN(256);
87 __init_begin = .;
88 .text.init : { *(.text.init) }
89 .data.init : { *(.data.init) }
90 . = ALIGN(256);
91 __init_end = .;
92
93 __bss_start = .;
Wolfgang Denk828a9782008-01-12 20:31:39 +0100[diff] [blame]94 .bss (NOLOAD) :
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]95 {
Wolfgang Denkfe33e6e2010-11-21 20:55:42 +0100[diff] [blame]96 *(.bss*)
97 *(.sbss*)
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]98 *(COMMON)
Selvamuthukumard2454ba2008-10-16 22:54:03 +0530[diff] [blame]99 . = ALIGN(4);
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]100 }
101
Po-Yu Chuangcedbf4b2011-03-01 22:59:59 +0000[diff] [blame]102 __bss_end__ = . ;
Stefan Roese42fbddd2006-09-07 11:51:23 +0200[diff] [blame]103 PROVIDE (end = .);
104}