Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Samsung Electronics |
| 4 | * Przemyslaw Marczak <p.marczak@samsung.com> |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <fdtdec.h> |
| 9 | #include <errno.h> |
| 10 | #include <dm.h> |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 11 | #include <power/pmic.h> |
| 12 | #include <power/regulator.h> |
| 13 | #include <power/sandbox_pmic.h> |
| 14 | |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 15 | #define MODE(_id, _val, _name) [_id] = { \ |
| 16 | .id = _id, \ |
| 17 | .register_value = _val, \ |
| 18 | .name = _name, \ |
| 19 | } |
| 20 | |
| 21 | #define RANGE(_min, _max, _step) { \ |
| 22 | .min = _min, \ |
| 23 | .max = _max, \ |
| 24 | .step = _step, \ |
| 25 | } |
| 26 | |
| 27 | /* |
| 28 | * struct output_range - helper structure type to define the range of output |
| 29 | * operating values (current/voltage), limited by the PMIC IC design. |
| 30 | * |
| 31 | * @min - minimum value |
| 32 | * @max - maximum value |
| 33 | * @step - step value |
| 34 | */ |
| 35 | struct output_range { |
| 36 | int min; |
| 37 | int max; |
| 38 | int step; |
| 39 | }; |
| 40 | |
| 41 | /* BUCK: 1,2 - voltage range */ |
| 42 | static struct output_range buck_voltage_range[] = { |
| 43 | RANGE(OUT_BUCK1_UV_MIN, OUT_BUCK1_UV_MAX, OUT_BUCK1_UV_STEP), |
| 44 | RANGE(OUT_BUCK2_UV_MIN, OUT_BUCK2_UV_MAX, OUT_BUCK2_UV_STEP), |
| 45 | }; |
| 46 | |
| 47 | /* BUCK: 1 - current range */ |
| 48 | static struct output_range buck_current_range[] = { |
| 49 | RANGE(OUT_BUCK1_UA_MIN, OUT_BUCK1_UA_MAX, OUT_BUCK1_UA_STEP), |
| 50 | }; |
| 51 | |
| 52 | /* BUCK operating modes */ |
| 53 | static struct dm_regulator_mode sandbox_buck_modes[] = { |
| 54 | MODE(BUCK_OM_OFF, OM2REG(BUCK_OM_OFF), "OFF"), |
| 55 | MODE(BUCK_OM_ON, OM2REG(BUCK_OM_ON), "ON"), |
| 56 | MODE(BUCK_OM_PWM, OM2REG(BUCK_OM_PWM), "PWM"), |
| 57 | }; |
| 58 | |
| 59 | /* LDO: 1,2 - voltage range */ |
| 60 | static struct output_range ldo_voltage_range[] = { |
| 61 | RANGE(OUT_LDO1_UV_MIN, OUT_LDO1_UV_MAX, OUT_LDO1_UV_STEP), |
| 62 | RANGE(OUT_LDO2_UV_MIN, OUT_LDO2_UV_MAX, OUT_LDO2_UV_STEP), |
| 63 | }; |
| 64 | |
| 65 | /* LDO: 1 - current range */ |
| 66 | static struct output_range ldo_current_range[] = { |
| 67 | RANGE(OUT_LDO1_UA_MIN, OUT_LDO1_UA_MAX, OUT_LDO1_UA_STEP), |
| 68 | }; |
| 69 | |
| 70 | /* LDO operating modes */ |
| 71 | static struct dm_regulator_mode sandbox_ldo_modes[] = { |
| 72 | MODE(LDO_OM_OFF, OM2REG(LDO_OM_OFF), "OFF"), |
| 73 | MODE(LDO_OM_ON, OM2REG(LDO_OM_ON), "ON"), |
| 74 | MODE(LDO_OM_SLEEP, OM2REG(LDO_OM_SLEEP), "SLEEP"), |
| 75 | MODE(LDO_OM_STANDBY, OM2REG(LDO_OM_STANDBY), "STANDBY"), |
| 76 | }; |
| 77 | |
| 78 | int out_get_value(struct udevice *dev, int output_count, int reg_type, |
| 79 | struct output_range *range) |
| 80 | { |
| 81 | uint8_t reg_val; |
| 82 | uint reg; |
| 83 | int ret; |
| 84 | |
| 85 | if (dev->driver_data > output_count) { |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 86 | pr_err("Unknown regulator number: %lu for PMIC %s!", |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 87 | dev->driver_data, dev->name); |
| 88 | return -EINVAL; |
| 89 | } |
| 90 | |
| 91 | reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type; |
| 92 | ret = pmic_read(dev->parent, reg, ®_val, 1); |
| 93 | if (ret) { |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 94 | pr_err("PMIC read failed: %d\n", ret); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 95 | return ret; |
| 96 | } |
| 97 | |
| 98 | ret = REG2VAL(range[dev->driver_data - 1].min, |
| 99 | range[dev->driver_data - 1].step, |
| 100 | reg_val); |
| 101 | |
| 102 | return ret; |
| 103 | } |
| 104 | |
| 105 | static int out_set_value(struct udevice *dev, int output_count, int reg_type, |
| 106 | struct output_range *range, int value) |
| 107 | { |
| 108 | uint8_t reg_val; |
| 109 | uint reg; |
| 110 | int ret; |
| 111 | int max_value; |
| 112 | |
| 113 | if (dev->driver_data > output_count) { |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 114 | pr_err("Unknown regulator number: %lu for PMIC %s!", |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 115 | dev->driver_data, dev->name); |
| 116 | return -EINVAL; |
| 117 | } |
| 118 | |
| 119 | max_value = range[dev->driver_data - 1].max; |
| 120 | if (value > max_value) { |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 121 | pr_err("Wrong value for %s: %lu. Max is: %d.", |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 122 | dev->name, dev->driver_data, max_value); |
| 123 | return -EINVAL; |
| 124 | } |
| 125 | |
| 126 | reg_val = VAL2REG(range[dev->driver_data - 1].min, |
| 127 | range[dev->driver_data - 1].step, |
| 128 | value); |
| 129 | |
| 130 | reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type; |
| 131 | ret = pmic_write(dev->parent, reg, ®_val, 1); |
| 132 | if (ret) { |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 133 | pr_err("PMIC write failed: %d\n", ret); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 134 | return ret; |
| 135 | } |
| 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | static int out_get_mode(struct udevice *dev) |
| 141 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 142 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 143 | uint8_t reg_val; |
| 144 | uint reg; |
| 145 | int ret; |
| 146 | int i; |
| 147 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 148 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 149 | |
| 150 | reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM; |
| 151 | ret = pmic_read(dev->parent, reg, ®_val, 1); |
| 152 | if (ret) { |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 153 | pr_err("PMIC read failed: %d\n", ret); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 154 | return ret; |
| 155 | } |
| 156 | |
| 157 | for (i = 0; i < uc_pdata->mode_count; i++) { |
| 158 | if (reg_val == uc_pdata->mode[i].register_value) |
| 159 | return uc_pdata->mode[i].id; |
| 160 | } |
| 161 | |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 162 | pr_err("Unknown operation mode for %s!", dev->name); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 163 | return -EINVAL; |
| 164 | } |
| 165 | |
| 166 | static int out_set_mode(struct udevice *dev, int mode) |
| 167 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 168 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 169 | int reg_val = -1; |
| 170 | uint reg; |
| 171 | int ret; |
| 172 | int i; |
| 173 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 174 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 175 | |
| 176 | if (mode >= uc_pdata->mode_count) |
| 177 | return -EINVAL; |
| 178 | |
| 179 | for (i = 0; i < uc_pdata->mode_count; i++) { |
| 180 | if (mode == uc_pdata->mode[i].id) { |
| 181 | reg_val = uc_pdata->mode[i].register_value; |
| 182 | break; |
| 183 | } |
| 184 | } |
| 185 | |
| 186 | if (reg_val == -1) { |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 187 | pr_err("Unknown operation mode for %s!", dev->name); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 188 | return -EINVAL; |
| 189 | } |
| 190 | |
| 191 | reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM; |
| 192 | ret = pmic_write(dev->parent, reg, (uint8_t *)®_val, 1); |
| 193 | if (ret) { |
Masahiro Yamada | 81e1042 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 194 | pr_err("PMIC write failed: %d\n", ret); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 195 | return ret; |
| 196 | } |
| 197 | |
| 198 | return 0; |
| 199 | } |
| 200 | |
| 201 | static int buck_get_voltage(struct udevice *dev) |
| 202 | { |
| 203 | return out_get_value(dev, SANDBOX_BUCK_COUNT, OUT_REG_UV, |
| 204 | buck_voltage_range); |
| 205 | } |
| 206 | |
| 207 | static int buck_set_voltage(struct udevice *dev, int uV) |
| 208 | { |
| 209 | return out_set_value(dev, SANDBOX_BUCK_COUNT, OUT_REG_UV, |
| 210 | buck_voltage_range, uV); |
| 211 | } |
| 212 | |
| 213 | static int buck_get_current(struct udevice *dev) |
| 214 | { |
| 215 | /* BUCK2 - unsupported */ |
| 216 | if (dev->driver_data == 2) |
| 217 | return -ENOSYS; |
| 218 | |
| 219 | return out_get_value(dev, SANDBOX_BUCK_COUNT, OUT_REG_UA, |
| 220 | buck_current_range); |
| 221 | } |
| 222 | |
| 223 | static int buck_set_current(struct udevice *dev, int uA) |
| 224 | { |
| 225 | /* BUCK2 - unsupported */ |
| 226 | if (dev->driver_data == 2) |
| 227 | return -ENOSYS; |
| 228 | |
| 229 | return out_set_value(dev, SANDBOX_BUCK_COUNT, OUT_REG_UA, |
| 230 | buck_current_range, uA); |
| 231 | } |
| 232 | |
Keerthy | 20507b2 | 2017-06-13 09:53:53 +0530 | [diff] [blame] | 233 | static int buck_get_enable(struct udevice *dev) |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 234 | { |
| 235 | if (out_get_mode(dev) == BUCK_OM_OFF) |
| 236 | return false; |
| 237 | |
| 238 | return true; |
| 239 | } |
| 240 | |
| 241 | static int buck_set_enable(struct udevice *dev, bool enable) |
| 242 | { |
| 243 | return out_set_mode(dev, enable ? BUCK_OM_ON : BUCK_OM_OFF); |
| 244 | } |
| 245 | |
| 246 | static int sandbox_buck_probe(struct udevice *dev) |
| 247 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 248 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 249 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 250 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 251 | |
| 252 | uc_pdata->type = REGULATOR_TYPE_BUCK; |
| 253 | uc_pdata->mode = sandbox_buck_modes; |
| 254 | uc_pdata->mode_count = ARRAY_SIZE(sandbox_buck_modes); |
| 255 | |
| 256 | return 0; |
| 257 | } |
| 258 | |
| 259 | static const struct dm_regulator_ops sandbox_buck_ops = { |
| 260 | .get_value = buck_get_voltage, |
| 261 | .set_value = buck_set_voltage, |
| 262 | .get_current = buck_get_current, |
| 263 | .set_current = buck_set_current, |
| 264 | .get_enable = buck_get_enable, |
| 265 | .set_enable = buck_set_enable, |
| 266 | .get_mode = out_get_mode, |
| 267 | .set_mode = out_set_mode, |
| 268 | }; |
| 269 | |
| 270 | U_BOOT_DRIVER(sandbox_buck) = { |
| 271 | .name = SANDBOX_BUCK_DRIVER, |
| 272 | .id = UCLASS_REGULATOR, |
| 273 | .ops = &sandbox_buck_ops, |
| 274 | .probe = sandbox_buck_probe, |
| 275 | }; |
| 276 | |
| 277 | static int ldo_get_voltage(struct udevice *dev) |
| 278 | { |
| 279 | return out_get_value(dev, SANDBOX_LDO_COUNT, OUT_REG_UV, |
| 280 | ldo_voltage_range); |
| 281 | } |
| 282 | |
| 283 | static int ldo_set_voltage(struct udevice *dev, int uV) |
| 284 | { |
| 285 | return out_set_value(dev, SANDBOX_LDO_COUNT, OUT_REG_UV, |
| 286 | ldo_voltage_range, uV); |
| 287 | } |
| 288 | |
| 289 | static int ldo_get_current(struct udevice *dev) |
| 290 | { |
| 291 | /* LDO2 - unsupported */ |
| 292 | if (dev->driver_data == 2) |
| 293 | return -ENOSYS; |
| 294 | |
| 295 | return out_get_value(dev, SANDBOX_LDO_COUNT, OUT_REG_UA, |
| 296 | ldo_current_range); |
| 297 | } |
| 298 | |
| 299 | static int ldo_set_current(struct udevice *dev, int uA) |
| 300 | { |
| 301 | /* LDO2 - unsupported */ |
| 302 | if (dev->driver_data == 2) |
| 303 | return -ENOSYS; |
| 304 | |
| 305 | return out_set_value(dev, SANDBOX_LDO_COUNT, OUT_REG_UA, |
| 306 | ldo_current_range, uA); |
| 307 | } |
| 308 | |
Keerthy | 20507b2 | 2017-06-13 09:53:53 +0530 | [diff] [blame] | 309 | static int ldo_get_enable(struct udevice *dev) |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 310 | { |
| 311 | if (out_get_mode(dev) == LDO_OM_OFF) |
| 312 | return false; |
| 313 | |
| 314 | return true; |
| 315 | } |
| 316 | |
| 317 | static int ldo_set_enable(struct udevice *dev, bool enable) |
| 318 | { |
| 319 | return out_set_mode(dev, enable ? LDO_OM_ON : LDO_OM_OFF); |
| 320 | } |
| 321 | |
| 322 | static int sandbox_ldo_probe(struct udevice *dev) |
| 323 | { |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 324 | struct dm_regulator_uclass_plat *uc_pdata; |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 325 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 326 | uc_pdata = dev_get_uclass_plat(dev); |
Przemyslaw Marczak | d5175dc | 2015-05-13 13:38:32 +0200 | [diff] [blame] | 327 | |
| 328 | uc_pdata->type = REGULATOR_TYPE_LDO; |
| 329 | uc_pdata->mode = sandbox_ldo_modes; |
| 330 | uc_pdata->mode_count = ARRAY_SIZE(sandbox_ldo_modes); |
| 331 | |
| 332 | return 0; |
| 333 | } |
| 334 | |
| 335 | static const struct dm_regulator_ops sandbox_ldo_ops = { |
| 336 | .get_value = ldo_get_voltage, |
| 337 | .set_value = ldo_set_voltage, |
| 338 | .get_current = ldo_get_current, |
| 339 | .set_current = ldo_set_current, |
| 340 | .get_enable = ldo_get_enable, |
| 341 | .set_enable = ldo_set_enable, |
| 342 | .get_mode = out_get_mode, |
| 343 | .set_mode = out_set_mode, |
| 344 | }; |
| 345 | |
| 346 | U_BOOT_DRIVER(sandbox_ldo) = { |
| 347 | .name = SANDBOX_LDO_DRIVER, |
| 348 | .id = UCLASS_REGULATOR, |
| 349 | .ops = &sandbox_ldo_ops, |
| 350 | .probe = sandbox_ldo_probe, |
| 351 | }; |