Bartlomiej Sieka | 2dfa3d2 | 2006-10-13 21:09:09 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * |
| 3 | * (C) Copyright 2006 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #include <common.h> |
| 26 | #include <mpc5xxx.h> |
| 27 | |
| 28 | #define GPIO_ENABLE (MPC5XXX_WU_GPIO) |
| 29 | |
| 30 | /* Open Drain Emulation Register */ |
| 31 | #define GPIO_ODR (MPC5XXX_WU_GPIO + 0x04) |
| 32 | |
| 33 | /* Data Direction Register */ |
| 34 | #define GPIO_DDR (MPC5XXX_WU_GPIO + 0x08) |
| 35 | |
| 36 | /* Data Value Out Register */ |
| 37 | #define GPIO_DVOR (MPC5XXX_WU_GPIO + 0x0C) |
| 38 | |
| 39 | /* Interrupt Enable Register */ |
| 40 | #define GPIO_IER (MPC5XXX_WU_GPIO + 0x10) |
| 41 | |
| 42 | /* Individual Interrupt Enable Register */ |
| 43 | #define GPIO_IIER (MPC5XXX_WU_GPIO + 0x14) |
| 44 | |
| 45 | /* Interrupt Type Register */ |
| 46 | #define GPIO_ITR (MPC5XXX_WU_GPIO + 0x18) |
| 47 | |
| 48 | /* Master Enable Register */ |
| 49 | #define GPIO_MER (MPC5XXX_WU_GPIO + 0x1C) |
| 50 | |
| 51 | /* Data Input Value Register */ |
| 52 | #define GPIO_DIVR (MPC5XXX_WU_GPIO + 0x20) |
| 53 | |
| 54 | /* Status Register */ |
| 55 | #define GPIO_SR (MPC5XXX_WU_GPIO + 0x24) |
| 56 | |
| 57 | #define PSC6_0 0x10000000 |
| 58 | #define WKUP_7 0x80000000 |
| 59 | |
| 60 | /* For NS4 A/B board define WKUP_7, for V38B board PSC_6 */ |
| 61 | #define GPIO_PIN PSC6_0 |
| 62 | |
| 63 | #define NO_ERROR 0 |
| 64 | #define ERR_NO_NUMBER 1 |
| 65 | #define ERR_BAD_NUMBER 2 |
| 66 | |
| 67 | typedef volatile unsigned long GPIO_REG; |
| 68 | typedef GPIO_REG *GPIO_REG_PTR; |
| 69 | |
| 70 | static int is_high(void); |
| 71 | static int check_device(void); |
| 72 | static void io_out(int value); |
| 73 | static void io_input(void); |
| 74 | static void io_output(void); |
| 75 | static void init_gpio(void); |
| 76 | static void read_byte(unsigned char *data); |
| 77 | static void write_byte(unsigned char command); |
| 78 | |
| 79 | void read_2501_memory(unsigned char *psernum, unsigned char *perr); |
| 80 | void board_get_enetaddr(uchar *enetaddr); |
| 81 | |
| 82 | static int is_high() |
| 83 | { |
| 84 | return (* ((vu_long *) GPIO_DIVR) & GPIO_PIN); |
| 85 | } |
| 86 | |
| 87 | static void io_out(int value) |
| 88 | { |
| 89 | if (value) |
| 90 | *((vu_long *) GPIO_DVOR) |= GPIO_PIN; |
| 91 | else |
| 92 | *((vu_long *) GPIO_DVOR) &= ~GPIO_PIN; |
| 93 | } |
| 94 | |
| 95 | static void io_input() |
| 96 | { |
| 97 | *((vu_long *) GPIO_DDR) &= ~GPIO_PIN; |
| 98 | udelay(3); /* allow input to settle */ |
| 99 | } |
| 100 | |
| 101 | static void io_output() |
| 102 | { |
| 103 | *((vu_long *) GPIO_DDR) |= GPIO_PIN; |
| 104 | } |
| 105 | |
| 106 | static void init_gpio() |
| 107 | { |
| 108 | *((vu_long *) GPIO_ENABLE) |= GPIO_PIN; /* Enable appropriate pin */ |
| 109 | } |
| 110 | |
| 111 | void read_2501_memory(unsigned char *psernum, unsigned char *perr) |
| 112 | { |
| 113 | #define NBYTES 28 |
| 114 | unsigned char crcval, i; |
| 115 | unsigned char buf[NBYTES]; |
| 116 | |
| 117 | *perr = 0; |
| 118 | crcval = 0; |
| 119 | |
| 120 | for (i=0; i<NBYTES; i++) |
| 121 | |
| 122 | |
| 123 | if (!check_device()) |
| 124 | *perr = ERR_NO_NUMBER; |
| 125 | else { |
| 126 | *perr = NO_ERROR; |
| 127 | write_byte(0xCC); /* skip ROM (0xCC) */ |
| 128 | write_byte(0xF0); /* Read memory command 0xF0 */ |
| 129 | write_byte(0x00); /* Address TA1=0, TA2=0 */ |
| 130 | write_byte(0x00); |
| 131 | read_byte(&crcval); /* Read CRC of address and command */ |
| 132 | |
| 133 | for (i=0; i<NBYTES; i++) |
| 134 | read_byte( &buf[i] ); |
| 135 | } |
| 136 | if (strncmp((const char*) &buf[11], "MAREL IEEE 802.3", 16)) { |
| 137 | *perr = ERR_BAD_NUMBER; |
| 138 | psernum[0] = 0x00; |
| 139 | psernum[1] = 0xE0; |
| 140 | psernum[2] = 0xEE; |
| 141 | psernum[3] = 0xFF; |
| 142 | psernum[4] = 0xFF; |
| 143 | psernum[5] = 0xFF; |
| 144 | } |
| 145 | else { |
| 146 | psernum[0] = 0x00; |
| 147 | psernum[1] = 0xE0; |
| 148 | psernum[2] = 0xEE; |
| 149 | psernum[3] = buf[7]; |
| 150 | psernum[4] = buf[6]; |
| 151 | psernum[5] = buf[5]; |
| 152 | } |
| 153 | } |
| 154 | |
| 155 | static int check_device() |
| 156 | { |
| 157 | int found; |
| 158 | |
| 159 | io_output(); |
| 160 | io_out(0); |
| 161 | udelay(500); /* must be at least 480 us low pulse */ |
| 162 | |
| 163 | io_input(); |
| 164 | udelay(60); |
| 165 | |
| 166 | found = (is_high() == 0) ? 1 : 0; |
| 167 | udelay(500); /* must be at least 480 us low pulse */ |
| 168 | |
| 169 | return found; |
| 170 | } |
| 171 | |
| 172 | static void write_byte(unsigned char command) |
| 173 | { |
| 174 | char i; |
| 175 | |
| 176 | for (i=0; i<8; i++) { |
| 177 | /* 1 us to 15 us low pulse starts bit slot */ |
| 178 | /* Start with high pulse for 3 us */ |
| 179 | io_input(); |
| 180 | |
| 181 | udelay(3); |
| 182 | |
| 183 | io_out(0); |
| 184 | io_output(); |
| 185 | |
| 186 | udelay(3); |
| 187 | |
| 188 | if (command & 0x01) { |
| 189 | /* 60 us high for 1-bit */ |
| 190 | io_input(); |
| 191 | udelay(60); |
| 192 | } |
| 193 | else { |
| 194 | /* 60 us low for 0-bit */ |
| 195 | udelay(60); |
| 196 | } |
| 197 | /* Leave pin as input */ |
| 198 | io_input(); |
| 199 | |
| 200 | command = command >> 1; |
| 201 | } |
| 202 | } |
| 203 | |
| 204 | static void read_byte(unsigned char *data) |
| 205 | { |
| 206 | unsigned char i, rdat = 0; |
| 207 | |
| 208 | for (i=0; i<8; i++) { |
| 209 | /* read one bit from one-wire device */ |
| 210 | |
| 211 | /* 1 - 15 us low starts bit slot */ |
| 212 | io_out(0); |
| 213 | io_output(); |
| 214 | udelay(0); |
| 215 | |
| 216 | /* allow line to be pulled high */ |
| 217 | io_input(); |
| 218 | |
| 219 | /* delay 10 us */ |
| 220 | udelay(10); |
| 221 | |
| 222 | /* now sample input status */ |
| 223 | if (is_high()) |
| 224 | rdat = (rdat >> 1) | 0x80; |
| 225 | else |
| 226 | rdat = rdat >> 1; |
| 227 | |
| 228 | udelay(60); /* at least 60 us */ |
| 229 | } |
| 230 | /* copy the return value */ |
| 231 | *data = rdat; |
| 232 | } |
| 233 | |
| 234 | void board_get_enetaddr(uchar *enetaddr) |
| 235 | { |
| 236 | unsigned char sn[6], err=NO_ERROR; |
| 237 | |
| 238 | init_gpio(); |
| 239 | |
| 240 | read_2501_memory(sn, &err); |
| 241 | |
| 242 | if (err == NO_ERROR) { |
| 243 | sprintf(enetaddr, "%02x:%02x:%02x:%02x:%02x:%02x", |
| 244 | sn[0], sn[1], sn[2], sn[3], sn[4], sn[5]); |
| 245 | printf("MAC address: %s\n", enetaddr); |
| 246 | setenv("ethaddr", enetaddr); |
| 247 | } |
| 248 | else { |
| 249 | sprintf(enetaddr, "00:01:02:03:04:05"); |
| 250 | printf("Error reading MAC address.\n"); |
| 251 | printf("Setting default to %s\n", enetaddr); |
| 252 | setenv("ethaddr", enetaddr); |
| 253 | } |
| 254 | } |