blob: 63721018c168b48a040187ae2d41c3f031da21b1 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
rev13@wp.plb3b57e82015-03-01 12:44:39 +01002/*
3 * (C) Copyright 2010,2011
4 * Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
5 *
6 * (C) Copyright 2015
Kamil Lulkodecd33b2015-11-29 11:50:53 +01007 * Kamil Lulko, <kamil.lulko@gmail.com>
rev13@wp.plb3b57e82015-03-01 12:44:39 +01008 */
9
10#include <common.h>
Simon Glass1d91ba72019-11-14 12:57:37 -070011#include <cpu_func.h>
Simon Glass8f3f7612019-11-14 12:57:42 -070012#include <irq_func.h>
rev13@wp.plb3b57e82015-03-01 12:44:39 +010013#include <asm/io.h>
14#include <asm/armv7m.h>
15
16/*
17 * This is called right before passing control to
18 * the Linux kernel point.
19 */
20int cleanup_before_linux(void)
21{
Vikas Manochacd9b3bd2017-05-03 15:48:26 -070022 /*
23 * this function is called just before we call linux
24 * it prepares the processor for linux
25 *
26 * disable interrupt and turn off caches etc ...
27 */
28 disable_interrupts();
29 /*
30 * turn off D-cache
31 * dcache_disable() in turn flushes the d-cache
32 * MPU is still enabled & can't be disabled as the u-boot
33 * code might be running in sdram which by default is not
34 * executable area.
35 */
36 dcache_disable();
37 /* invalidate to make sure no cache line gets dirty between
38 * dcache flushing and disabling dcache */
39 invalidate_dcache_all();
40
Patrice Chotardbedc1582018-03-30 09:22:40 +020041 icache_disable();
42 invalidate_icache_all();
43
rev13@wp.plb3b57e82015-03-01 12:44:39 +010044 return 0;
45}
46
47/*
48 * Perform the low-level reset.
49 */
Harald Seiler6f14d5f2020-12-15 16:47:52 +010050void reset_cpu(void)
rev13@wp.plb3b57e82015-03-01 12:44:39 +010051{
52 /*
53 * Perform reset but keep priority group unchanged.
54 */
55 writel((V7M_AIRCR_VECTKEY << V7M_AIRCR_VECTKEY_SHIFT)
56 | (V7M_SCB->aircr & V7M_AIRCR_PRIGROUP_MSK)
57 | V7M_AIRCR_SYSRESET, &V7M_SCB->aircr);
58}