Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2014 - 2018 Xilinx, Inc. |
Michal Simek | a8c9436 | 2023-07-10 14:35:49 +0200 | [diff] [blame] | 4 | * Michal Simek <michal.simek@amd.com> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
Algapally Santosh Sagar | 3c351b2 | 2023-01-19 22:36:16 -0700 | [diff] [blame] | 7 | #include <command.h> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 8 | #include <common.h> |
Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 9 | #include <cpu_func.h> |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 10 | #include <env.h> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 11 | #include <fdtdec.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 12 | #include <init.h> |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 13 | #include <env_internal.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 14 | #include <log.h> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 15 | #include <malloc.h> |
Simon Glass | 495a5dc | 2019-11-14 12:57:30 -0700 | [diff] [blame] | 16 | #include <time.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 17 | #include <asm/cache.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 18 | #include <asm/global_data.h> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 19 | #include <asm/io.h> |
| 20 | #include <asm/arch/hardware.h> |
Michal Simek | 21eb5cc | 2019-04-29 09:39:09 -0700 | [diff] [blame] | 21 | #include <asm/arch/sys_proto.h> |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 22 | #include <dm/device.h> |
| 23 | #include <dm/uclass.h> |
Siva Durga Prasad Paladugu | b739897 | 2019-08-05 15:54:59 +0530 | [diff] [blame] | 24 | #include <versalpl.h> |
Michal Simek | 705d44a | 2020-03-31 12:39:37 +0200 | [diff] [blame] | 25 | #include "../common/board.h" |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 26 | |
| 27 | DECLARE_GLOBAL_DATA_PTR; |
| 28 | |
Siva Durga Prasad Paladugu | b739897 | 2019-08-05 15:54:59 +0530 | [diff] [blame] | 29 | #if defined(CONFIG_FPGA_VERSALPL) |
Oleksandr Suvorov | dae95a4 | 2022-07-22 17:16:04 +0300 | [diff] [blame] | 30 | static xilinx_desc versalpl = { |
| 31 | xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL, |
| 32 | FPGA_LEGACY |
| 33 | }; |
Siva Durga Prasad Paladugu | b739897 | 2019-08-05 15:54:59 +0530 | [diff] [blame] | 34 | #endif |
| 35 | |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 36 | int board_init(void) |
| 37 | { |
| 38 | printf("EL Level:\tEL%d\n", current_el()); |
| 39 | |
Siva Durga Prasad Paladugu | b739897 | 2019-08-05 15:54:59 +0530 | [diff] [blame] | 40 | #if defined(CONFIG_FPGA_VERSALPL) |
| 41 | fpga_init(); |
| 42 | fpga_add(fpga_xilinx, &versalpl); |
| 43 | #endif |
| 44 | |
Michal Simek | 394ee24 | 2020-08-03 13:01:45 +0200 | [diff] [blame] | 45 | if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM)) |
| 46 | xilinx_read_eeprom(); |
| 47 | |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 48 | return 0; |
| 49 | } |
| 50 | |
| 51 | int board_early_init_r(void) |
| 52 | { |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 53 | u32 val; |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 54 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 55 | if (current_el() != 3) |
| 56 | return 0; |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 57 | |
Michal Simek | f56f7d1 | 2019-01-28 11:12:41 +0100 | [diff] [blame] | 58 | debug("iou_switch ctrl div0 %x\n", |
| 59 | readl(&crlapb_base->iou_switch_ctrl)); |
| 60 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 61 | writel(IOU_SWITCH_CTRL_CLKACT_BIT | |
Michal Simek | f56f7d1 | 2019-01-28 11:12:41 +0100 | [diff] [blame] | 62 | (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 63 | &crlapb_base->iou_switch_ctrl); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 64 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 65 | /* Global timer init - Program time stamp reference clk */ |
| 66 | val = readl(&crlapb_base->timestamp_ref_ctrl); |
| 67 | val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; |
| 68 | writel(val, &crlapb_base->timestamp_ref_ctrl); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 69 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 70 | debug("ref ctrl 0x%x\n", |
| 71 | readl(&crlapb_base->timestamp_ref_ctrl)); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 72 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 73 | /* Clear reset of timestamp reg */ |
| 74 | writel(0, &crlapb_base->rst_timestamp); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 75 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 76 | /* |
| 77 | * Program freq register in System counter and |
| 78 | * enable system counter. |
| 79 | */ |
Peng Fan | 4b3a182 | 2022-04-13 17:47:17 +0800 | [diff] [blame] | 80 | writel(CONFIG_COUNTER_FREQUENCY, |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 81 | &iou_scntr_secure->base_frequency_id_register); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 82 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 83 | debug("counter val 0x%x\n", |
| 84 | readl(&iou_scntr_secure->base_frequency_id_register)); |
| 85 | |
| 86 | writel(IOU_SCNTRS_CONTROL_EN, |
| 87 | &iou_scntr_secure->counter_control_register); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 88 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 89 | debug("scntrs control 0x%x\n", |
| 90 | readl(&iou_scntr_secure->counter_control_register)); |
| 91 | debug("timer 0x%llx\n", get_ticks()); |
| 92 | debug("timer 0x%llx\n", get_ticks()); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 93 | |
| 94 | return 0; |
| 95 | } |
| 96 | |
Ashok Reddy Soma | 6c19105 | 2022-05-05 23:53:45 -0600 | [diff] [blame] | 97 | unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, |
| 98 | char *const argv[]) |
| 99 | { |
| 100 | int ret = 0; |
| 101 | |
| 102 | if (current_el() > 1) { |
| 103 | smp_kick_all_cpus(); |
| 104 | dcache_disable(); |
| 105 | armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry, |
| 106 | ES_TO_AARCH64); |
| 107 | } else { |
| 108 | printf("FAIL: current EL is not above EL1\n"); |
| 109 | ret = EINVAL; |
| 110 | } |
| 111 | return ret; |
| 112 | } |
| 113 | |
Michal Simek | 9c91e61 | 2020-04-08 11:04:41 +0200 | [diff] [blame] | 114 | static u8 versal_get_bootmode(void) |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 115 | { |
Michal Simek | 9c91e61 | 2020-04-08 11:04:41 +0200 | [diff] [blame] | 116 | u8 bootmode; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 117 | u32 reg = 0; |
Michal Simek | 9c91e61 | 2020-04-08 11:04:41 +0200 | [diff] [blame] | 118 | |
| 119 | reg = readl(&crp_base->boot_mode_usr); |
| 120 | |
| 121 | if (reg >> BOOT_MODE_ALT_SHIFT) |
| 122 | reg >>= BOOT_MODE_ALT_SHIFT; |
| 123 | |
| 124 | bootmode = reg & BOOT_MODES_MASK; |
| 125 | |
| 126 | return bootmode; |
| 127 | } |
| 128 | |
Michal Simek | b163476 | 2023-09-05 13:30:07 +0200 | [diff] [blame] | 129 | static int boot_targets_setup(void) |
Michal Simek | 9c91e61 | 2020-04-08 11:04:41 +0200 | [diff] [blame] | 130 | { |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 131 | u8 bootmode; |
| 132 | struct udevice *dev; |
| 133 | int bootseq = -1; |
| 134 | int bootseq_len = 0; |
| 135 | int env_targets_len = 0; |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 136 | const char *mode = NULL; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 137 | char *new_targets; |
| 138 | char *env_targets; |
| 139 | |
Michal Simek | 9c91e61 | 2020-04-08 11:04:41 +0200 | [diff] [blame] | 140 | bootmode = versal_get_bootmode(); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 141 | |
| 142 | puts("Bootmode: "); |
| 143 | switch (bootmode) { |
T Karthik Reddy | facca9a | 2019-07-11 16:07:57 +0530 | [diff] [blame] | 144 | case USB_MODE: |
| 145 | puts("USB_MODE\n"); |
T Karthik Reddy | 1104faf | 2021-03-30 23:24:57 -0600 | [diff] [blame] | 146 | mode = "usb_dfu0 usb_dfu1"; |
T Karthik Reddy | facca9a | 2019-07-11 16:07:57 +0530 | [diff] [blame] | 147 | break; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 148 | case JTAG_MODE: |
| 149 | puts("JTAG_MODE\n"); |
Siva Durga Prasad Paladugu | 00784e0 | 2019-06-25 17:13:14 +0530 | [diff] [blame] | 150 | mode = "jtag pxe dhcp"; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 151 | break; |
| 152 | case QSPI_MODE_24BIT: |
| 153 | puts("QSPI_MODE_24\n"); |
| 154 | mode = "xspi0"; |
| 155 | break; |
| 156 | case QSPI_MODE_32BIT: |
| 157 | puts("QSPI_MODE_32\n"); |
| 158 | mode = "xspi0"; |
| 159 | break; |
| 160 | case OSPI_MODE: |
| 161 | puts("OSPI_MODE\n"); |
| 162 | mode = "xspi0"; |
| 163 | break; |
| 164 | case EMMC_MODE: |
| 165 | puts("EMMC_MODE\n"); |
T Karthik Reddy | bc2b964 | 2019-12-16 04:44:26 -0700 | [diff] [blame] | 166 | if (uclass_get_device_by_name(UCLASS_MMC, |
T Karthik Reddy | a12445f | 2021-11-18 12:57:20 +0100 | [diff] [blame] | 167 | "mmc@f1050000", &dev) && |
| 168 | uclass_get_device_by_name(UCLASS_MMC, |
T Karthik Reddy | bc2b964 | 2019-12-16 04:44:26 -0700 | [diff] [blame] | 169 | "sdhci@f1050000", &dev)) { |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 170 | debug("SD1 driver for SD1 device is not present\n"); |
| 171 | break; |
T Karthik Reddy | bc2b964 | 2019-12-16 04:44:26 -0700 | [diff] [blame] | 172 | } |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 173 | debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); |
T Karthik Reddy | bc2b964 | 2019-12-16 04:44:26 -0700 | [diff] [blame] | 174 | mode = "mmc"; |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 175 | bootseq = dev_seq(dev); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 176 | break; |
| 177 | case SD_MODE: |
| 178 | puts("SD_MODE\n"); |
| 179 | if (uclass_get_device_by_name(UCLASS_MMC, |
T Karthik Reddy | a12445f | 2021-11-18 12:57:20 +0100 | [diff] [blame] | 180 | "mmc@f1040000", &dev) && |
| 181 | uclass_get_device_by_name(UCLASS_MMC, |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 182 | "sdhci@f1040000", &dev)) { |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 183 | debug("SD0 driver for SD0 device is not present\n"); |
| 184 | break; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 185 | } |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 186 | debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 187 | |
| 188 | mode = "mmc"; |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 189 | bootseq = dev_seq(dev); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 190 | break; |
| 191 | case SD1_LSHFT_MODE: |
| 192 | puts("LVL_SHFT_"); |
| 193 | /* fall through */ |
| 194 | case SD_MODE1: |
| 195 | puts("SD_MODE1\n"); |
| 196 | if (uclass_get_device_by_name(UCLASS_MMC, |
T Karthik Reddy | a12445f | 2021-11-18 12:57:20 +0100 | [diff] [blame] | 197 | "mmc@f1050000", &dev) && |
| 198 | uclass_get_device_by_name(UCLASS_MMC, |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 199 | "sdhci@f1050000", &dev)) { |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 200 | debug("SD1 driver for SD1 device is not present\n"); |
| 201 | break; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 202 | } |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 203 | debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 204 | |
| 205 | mode = "mmc"; |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 206 | bootseq = dev_seq(dev); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 207 | break; |
| 208 | default: |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 209 | printf("Invalid Boot Mode:0x%x\n", bootmode); |
| 210 | break; |
| 211 | } |
| 212 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 213 | if (mode) { |
| 214 | if (bootseq >= 0) { |
| 215 | bootseq_len = snprintf(NULL, 0, "%i", bootseq); |
| 216 | debug("Bootseq len: %x\n", bootseq_len); |
| 217 | } |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 218 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 219 | /* |
| 220 | * One terminating char + one byte for space between mode |
| 221 | * and default boot_targets |
| 222 | */ |
| 223 | env_targets = env_get("boot_targets"); |
| 224 | if (env_targets) |
| 225 | env_targets_len = strlen(env_targets); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 226 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 227 | new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + |
| 228 | bootseq_len); |
| 229 | if (!new_targets) |
| 230 | return -ENOMEM; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 231 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 232 | if (bootseq >= 0) |
| 233 | sprintf(new_targets, "%s%x %s", mode, bootseq, |
| 234 | env_targets ? env_targets : ""); |
| 235 | else |
| 236 | sprintf(new_targets, "%s %s", mode, |
| 237 | env_targets ? env_targets : ""); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 238 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 239 | env_set("boot_targets", new_targets); |
| 240 | } |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 241 | |
Michal Simek | b163476 | 2023-09-05 13:30:07 +0200 | [diff] [blame] | 242 | return 0; |
| 243 | } |
| 244 | |
| 245 | int board_late_init(void) |
| 246 | { |
| 247 | int ret; |
| 248 | |
| 249 | if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { |
| 250 | debug("Saved variables - Skipping\n"); |
| 251 | return 0; |
| 252 | } |
| 253 | |
| 254 | if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) |
| 255 | return 0; |
| 256 | |
| 257 | if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) { |
| 258 | ret = boot_targets_setup(); |
| 259 | if (ret) |
| 260 | return ret; |
| 261 | } |
| 262 | |
Michal Simek | 705d44a | 2020-03-31 12:39:37 +0200 | [diff] [blame] | 263 | return board_late_init_xilinx(); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 264 | } |
| 265 | |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 266 | int dram_init_banksize(void) |
| 267 | { |
Michal Simek | 21eb5cc | 2019-04-29 09:39:09 -0700 | [diff] [blame] | 268 | int ret; |
| 269 | |
| 270 | ret = fdtdec_setup_memory_banksize(); |
| 271 | if (ret) |
| 272 | return ret; |
| 273 | |
| 274 | mem_map_fill(); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 275 | |
| 276 | return 0; |
| 277 | } |
| 278 | |
| 279 | int dram_init(void) |
| 280 | { |
Michal Simek | 9134d4c | 2020-07-10 12:42:09 +0200 | [diff] [blame] | 281 | if (fdtdec_setup_mem_size_base_lowest() != 0) |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 282 | return -EINVAL; |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
Harald Seiler | 6f14d5f | 2020-12-15 16:47:52 +0100 | [diff] [blame] | 287 | void reset_cpu(void) |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 288 | { |
| 289 | } |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 290 | |
| 291 | enum env_location env_get_location(enum env_operation op, int prio) |
| 292 | { |
| 293 | u32 bootmode = versal_get_bootmode(); |
| 294 | |
| 295 | if (prio) |
| 296 | return ENVL_UNKNOWN; |
| 297 | |
| 298 | switch (bootmode) { |
| 299 | case EMMC_MODE: |
| 300 | case SD_MODE: |
| 301 | case SD1_LSHFT_MODE: |
| 302 | case SD_MODE1: |
| 303 | if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT)) |
| 304 | return ENVL_FAT; |
| 305 | if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4)) |
| 306 | return ENVL_EXT4; |
T Karthik Reddy | 6f8b205 | 2021-11-24 12:16:55 +0100 | [diff] [blame] | 307 | return ENVL_NOWHERE; |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 308 | case OSPI_MODE: |
| 309 | case QSPI_MODE_24BIT: |
| 310 | case QSPI_MODE_32BIT: |
| 311 | if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) |
| 312 | return ENVL_SPI_FLASH; |
T Karthik Reddy | 6f8b205 | 2021-11-24 12:16:55 +0100 | [diff] [blame] | 313 | return ENVL_NOWHERE; |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 314 | case JTAG_MODE: |
| 315 | default: |
| 316 | return ENVL_NOWHERE; |
| 317 | } |
| 318 | } |