blob: 815e334b2c868fa477b09365241977edca8ea167 [file] [log] [blame]
Lokesh Vutlaac736802019-06-13 10:29:55 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-j721e-som-p0.dtsi"
9
10/ {
11 aliases {
12 remoteproc0 = &sysctrler;
13 remoteproc1 = &a72_0;
14 };
15
16 chosen {
17 stdout-path = "serial2:115200n8";
18 tick-timer = &timer1;
19 };
20
21 a72_0: a72@0 {
22 compatible = "ti,am654-rproc";
23 reg = <0x0 0x00a90000 0x0 0x10>;
24 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
25 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
26 resets = <&k3_reset 202 0>;
27 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
28 assigned-clock-rates = <2000000000>, <200000000>;
29 ti,sci = <&dmsc>;
30 ti,sci-proc-id = <32>;
31 ti,sci-host-id = <10>;
32 u-boot,dm-spl;
33 };
34
35 clk_200mhz: dummy_clock {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <200000000>;
39 u-boot,dm-spl;
40 };
41};
42
43&cbass_mcu_wakeup {
44 mcu_secproxy: secproxy@28380000 {
45 u-boot,dm-spl;
46 compatible = "ti,am654-secure-proxy";
47 reg = <0x0 0x2a380000 0x0 0x80000>,
48 <0x0 0x2a400000 0x0 0x80000>,
49 <0x0 0x2a480000 0x0 0x80000>;
50 reg-names = "rt", "scfg", "target_data";
51 #mbox-cells = <1>;
52 };
53
54 sysctrler: sysctrler {
55 u-boot,dm-spl;
56 compatible = "ti,am654-system-controller";
57 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
58 mbox-names = "tx", "rx";
59 };
60};
61
62&dmsc {
63 mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
64 mbox-names = "tx", "rx", "notify";
65 ti,host-id = <4>;
66 ti,secure-host;
67};
68
69&wkup_pmx0 {
70 wkup_uart0_pins_default: wkup_uart0_pins_default {
71 u-boot,dm-spl;
72 pinctrl-single,pins = <
73 J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
74 J721E_WKUP_IOPAD(0xa4, PIN_OUTPUT, 0) /* (J28) WKUP_UART0_TXD */
75 >;
76 };
77
78 mcu_uart0_pins_default: mcu_uart0_pins_default {
79 u-boot,dm-spl;
80 pinctrl-single,pins = <
81 J721E_WKUP_IOPAD(0xe8, PIN_INPUT, 0) /* (H29) WKUP_GPIO0_14.MCU_UART0_CTSn */
82 J721E_WKUP_IOPAD(0xec, PIN_OUTPUT, 0) /* (J27) WKUP_GPIO0_15.MCU_UART0_RTSn */
83 J721E_WKUP_IOPAD(0xe4, PIN_INPUT, 0) /* (H28) WKUP_GPIO0_13.MCU_UART0_RXD */
84 J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29) WKUP_GPIO0_12.MCU_UART0_TXD */
85 >;
86 };
87};
88
89&main_pmx0 {
90 main_uart0_pins_default: main_uart0_pins_default {
91 u-boot,dm-spl;
92 pinctrl-single,pins = <
93 J721E_IOPAD(0x1d4, PIN_INPUT, 1) /* (Y3) SPI1_CS0.UART0_CTSn */
94 J721E_IOPAD(0x1c0, PIN_OUTPUT, 1) /* (AA2) SPI0_CS0.UART0_RTSn */
95 J721E_IOPAD(0x1e8, PIN_INPUT, 0) /* (AB2) UART0_RXD */
96 J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
97 >;
98 };
99};
100
101&wkup_uart0 {
102 u-boot,dm-spl;
103 pinctrl-names = "default";
104 pinctrl-0 = <&wkup_uart0_pins_default>;
105 status = "okay";
106};
107
108&mcu_uart0 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&mcu_uart0_pins_default>;
111 status = "okay";
112};
113
114&main_uart0 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&main_uart0_pins_default>;
117 status = "okay";
118 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
119};
120
121&main_sdhci0 {
122 /delete-property/ power-domains;
123 /delete-property/ assigned-clocks;
124 /delete-property/ assigned-clock-parents;
125 clock-names = "clk_xin";
126 clocks = <&clk_200mhz>;
127 ti,driver-strength-ohm = <50>;
128 non-removable;
129 bus-width = <8>;
130};
131
132&main_sdhci1 {
133 /delete-property/ power-domains;
134 /delete-property/ assigned-clocks;
135 /delete-property/ assigned-clock-parents;
136 clock-names = "clk_xin";
137 clocks = <&clk_200mhz>;
138 ti,driver-strength-ohm = <50>;
139};
140
141#include "k3-j721e-common-proc-board-u-boot.dtsi"