Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2014 Google, Inc |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 6 | #define LOG_CATEGORY UCLASS_SPI |
| 7 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 8 | #include <common.h> |
| 9 | #include <dm.h> |
| 10 | #include <errno.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 11 | #include <log.h> |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 12 | #include <malloc.h> |
| 13 | #include <spi.h> |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 14 | #include <dm/device_compat.h> |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 15 | #include <dm/device-internal.h> |
| 16 | #include <dm/uclass-internal.h> |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 17 | #include <dm/lists.h> |
| 18 | #include <dm/util.h> |
| 19 | |
| 20 | DECLARE_GLOBAL_DATA_PTR; |
| 21 | |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 22 | #define SPI_DEFAULT_SPEED_HZ 100000 |
| 23 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 24 | static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) |
| 25 | { |
| 26 | struct dm_spi_ops *ops; |
| 27 | int ret; |
| 28 | |
| 29 | ops = spi_get_ops(bus); |
| 30 | if (ops->set_speed) |
| 31 | ret = ops->set_speed(bus, speed); |
| 32 | else |
| 33 | ret = -EINVAL; |
| 34 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 35 | dev_err(bus, "Cannot set speed (err=%d)\n", ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 36 | return ret; |
| 37 | } |
| 38 | |
| 39 | if (ops->set_mode) |
| 40 | ret = ops->set_mode(bus, mode); |
| 41 | else |
| 42 | ret = -EINVAL; |
| 43 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 44 | dev_err(bus, "Cannot set mode (err=%d)\n", ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 45 | return ret; |
| 46 | } |
| 47 | |
| 48 | return 0; |
| 49 | } |
| 50 | |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 51 | int dm_spi_claim_bus(struct udevice *dev) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 52 | { |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 53 | struct udevice *bus = dev->parent; |
| 54 | struct dm_spi_ops *ops = spi_get_ops(bus); |
Simon Glass | de0977b | 2015-03-05 12:25:20 -0700 | [diff] [blame] | 55 | struct dm_spi_bus *spi = dev_get_uclass_priv(bus); |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 56 | struct spi_slave *slave = dev_get_parent_priv(dev); |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 57 | uint speed, mode; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 58 | |
| 59 | speed = slave->max_hz; |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 60 | mode = slave->mode; |
| 61 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 62 | if (spi->max_hz) { |
| 63 | if (speed) |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 64 | speed = min(speed, spi->max_hz); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 65 | else |
| 66 | speed = spi->max_hz; |
| 67 | } |
| 68 | if (!speed) |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 69 | speed = SPI_DEFAULT_SPEED_HZ; |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 70 | |
| 71 | if (speed != spi->speed || mode != spi->mode) { |
Mario Six | 2d844dd | 2018-01-15 11:08:41 +0100 | [diff] [blame] | 72 | int ret = spi_set_speed_mode(bus, speed, slave->mode); |
| 73 | |
Simon Glass | b46cb63 | 2015-02-17 15:29:35 -0700 | [diff] [blame] | 74 | if (ret) |
Simon Glass | 00d9990 | 2018-10-01 12:22:24 -0600 | [diff] [blame] | 75 | return log_ret(ret); |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 76 | |
| 77 | spi->speed = speed; |
| 78 | spi->mode = mode; |
Simon Glass | b46cb63 | 2015-02-17 15:29:35 -0700 | [diff] [blame] | 79 | } |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 80 | |
Simon Glass | 00d9990 | 2018-10-01 12:22:24 -0600 | [diff] [blame] | 81 | return log_ret(ops->claim_bus ? ops->claim_bus(dev) : 0); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 82 | } |
| 83 | |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 84 | void dm_spi_release_bus(struct udevice *dev) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 85 | { |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 86 | struct udevice *bus = dev->parent; |
| 87 | struct dm_spi_ops *ops = spi_get_ops(bus); |
| 88 | |
| 89 | if (ops->release_bus) |
Simon Glass | 5c74fba | 2015-04-19 09:05:40 -0600 | [diff] [blame] | 90 | ops->release_bus(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 91 | } |
| 92 | |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 93 | int dm_spi_xfer(struct udevice *dev, unsigned int bitlen, |
| 94 | const void *dout, void *din, unsigned long flags) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 95 | { |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 96 | struct udevice *bus = dev->parent; |
Simon Glass | 2d2e860 | 2019-12-06 21:42:35 -0700 | [diff] [blame] | 97 | struct dm_spi_ops *ops = spi_get_ops(bus); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 98 | |
| 99 | if (bus->uclass->uc_drv->id != UCLASS_SPI) |
| 100 | return -EOPNOTSUPP; |
Simon Glass | 2d2e860 | 2019-12-06 21:42:35 -0700 | [diff] [blame] | 101 | if (!ops->xfer) |
| 102 | return -ENOSYS; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 103 | |
Simon Glass | 2d2e860 | 2019-12-06 21:42:35 -0700 | [diff] [blame] | 104 | return ops->xfer(dev, bitlen, dout, din, flags); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 105 | } |
| 106 | |
Simon Glass | 37ad0fe | 2019-10-20 21:31:47 -0600 | [diff] [blame] | 107 | int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep, |
| 108 | uint *offsetp) |
| 109 | { |
| 110 | struct udevice *bus = dev->parent; |
| 111 | struct dm_spi_ops *ops = spi_get_ops(bus); |
| 112 | |
| 113 | if (bus->uclass->uc_drv->id != UCLASS_SPI) |
| 114 | return -EOPNOTSUPP; |
| 115 | if (!ops->get_mmap) |
| 116 | return -ENOSYS; |
| 117 | |
| 118 | return ops->get_mmap(dev, map_basep, map_sizep, offsetp); |
| 119 | } |
| 120 | |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 121 | int spi_claim_bus(struct spi_slave *slave) |
| 122 | { |
Simon Glass | 00d9990 | 2018-10-01 12:22:24 -0600 | [diff] [blame] | 123 | return log_ret(dm_spi_claim_bus(slave->dev)); |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | void spi_release_bus(struct spi_slave *slave) |
| 127 | { |
| 128 | dm_spi_release_bus(slave->dev); |
| 129 | } |
| 130 | |
| 131 | int spi_xfer(struct spi_slave *slave, unsigned int bitlen, |
| 132 | const void *dout, void *din, unsigned long flags) |
| 133 | { |
| 134 | return dm_spi_xfer(slave->dev, bitlen, dout, din, flags); |
| 135 | } |
| 136 | |
Jagan Teki | 7cc71fd | 2019-07-22 17:22:56 +0530 | [diff] [blame] | 137 | int spi_write_then_read(struct spi_slave *slave, const u8 *opcode, |
| 138 | size_t n_opcode, const u8 *txbuf, u8 *rxbuf, |
| 139 | size_t n_buf) |
| 140 | { |
| 141 | unsigned long flags = SPI_XFER_BEGIN; |
| 142 | int ret; |
| 143 | |
| 144 | if (n_buf == 0) |
| 145 | flags |= SPI_XFER_END; |
| 146 | |
| 147 | ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags); |
| 148 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 149 | dev_dbg(slave->dev, |
| 150 | "spi: failed to send command (%zu bytes): %d\n", |
| 151 | n_opcode, ret); |
Jagan Teki | 7cc71fd | 2019-07-22 17:22:56 +0530 | [diff] [blame] | 152 | } else if (n_buf != 0) { |
| 153 | ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END); |
| 154 | if (ret) |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 155 | dev_dbg(slave->dev, |
| 156 | "spi: failed to transfer %zu bytes of data: %d\n", |
| 157 | n_buf, ret); |
Jagan Teki | 7cc71fd | 2019-07-22 17:22:56 +0530 | [diff] [blame] | 158 | } |
| 159 | |
| 160 | return ret; |
| 161 | } |
| 162 | |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 163 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | d941aaf | 2015-06-23 15:39:05 -0600 | [diff] [blame] | 164 | static int spi_child_post_bind(struct udevice *dev) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 165 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 166 | struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 167 | |
Simon Glass | f1d50f7 | 2020-12-19 10:40:13 -0700 | [diff] [blame] | 168 | if (!dev_has_ofnode(dev)) |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 169 | return 0; |
| 170 | |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 171 | return spi_slave_of_to_plat(dev, plat); |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 172 | } |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 173 | #endif |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 174 | |
Simon Glass | d941aaf | 2015-06-23 15:39:05 -0600 | [diff] [blame] | 175 | static int spi_post_probe(struct udevice *bus) |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 176 | { |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 177 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | de0977b | 2015-03-05 12:25:20 -0700 | [diff] [blame] | 178 | struct dm_spi_bus *spi = dev_get_uclass_priv(bus); |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 179 | |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 180 | spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 181 | #endif |
Michal Simek | 28d7e4e | 2015-10-27 13:36:42 +0100 | [diff] [blame] | 182 | #if defined(CONFIG_NEEDS_MANUAL_RELOC) |
| 183 | struct dm_spi_ops *ops = spi_get_ops(bus); |
Ashok Reddy Soma | 1d89d8c | 2019-09-17 00:11:02 -0600 | [diff] [blame] | 184 | static int reloc_done; |
Michal Simek | 28d7e4e | 2015-10-27 13:36:42 +0100 | [diff] [blame] | 185 | |
Ashok Reddy Soma | 1d89d8c | 2019-09-17 00:11:02 -0600 | [diff] [blame] | 186 | if (!reloc_done) { |
| 187 | if (ops->claim_bus) |
| 188 | ops->claim_bus += gd->reloc_off; |
| 189 | if (ops->release_bus) |
| 190 | ops->release_bus += gd->reloc_off; |
| 191 | if (ops->set_wordlen) |
| 192 | ops->set_wordlen += gd->reloc_off; |
| 193 | if (ops->xfer) |
| 194 | ops->xfer += gd->reloc_off; |
| 195 | if (ops->set_speed) |
| 196 | ops->set_speed += gd->reloc_off; |
| 197 | if (ops->set_mode) |
| 198 | ops->set_mode += gd->reloc_off; |
| 199 | if (ops->cs_info) |
| 200 | ops->cs_info += gd->reloc_off; |
| 201 | reloc_done++; |
| 202 | } |
Michal Simek | 28d7e4e | 2015-10-27 13:36:42 +0100 | [diff] [blame] | 203 | #endif |
| 204 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 205 | return 0; |
| 206 | } |
| 207 | |
Simon Glass | d941aaf | 2015-06-23 15:39:05 -0600 | [diff] [blame] | 208 | static int spi_child_pre_probe(struct udevice *dev) |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 209 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 210 | struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev); |
Simon Glass | de44acf | 2015-09-28 23:32:01 -0600 | [diff] [blame] | 211 | struct spi_slave *slave = dev_get_parent_priv(dev); |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 212 | |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 213 | /* |
| 214 | * This is needed because we pass struct spi_slave around the place |
| 215 | * instead slave->dev (a struct udevice). So we have to have some |
| 216 | * way to access the slave udevice given struct spi_slave. Once we |
| 217 | * change the SPI API to use udevice instead of spi_slave, we can |
| 218 | * drop this. |
| 219 | */ |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 220 | slave->dev = dev; |
| 221 | |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 222 | slave->max_hz = plat->max_hz; |
| 223 | slave->mode = plat->mode; |
Christophe Ricard | fb0c53e | 2016-01-17 11:56:48 +0100 | [diff] [blame] | 224 | slave->wordlen = SPI_DEFAULT_WORDLEN; |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 225 | |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 226 | return 0; |
| 227 | } |
| 228 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 229 | int spi_chip_select(struct udevice *dev) |
| 230 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 231 | struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 232 | |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 233 | return plat ? plat->cs : -ENOENT; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 234 | } |
| 235 | |
Simon Glass | 5ef36f2 | 2014-11-11 10:46:22 -0700 | [diff] [blame] | 236 | int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 237 | { |
Bin Meng | 9741e73 | 2019-09-09 06:00:02 -0700 | [diff] [blame] | 238 | struct dm_spi_ops *ops; |
| 239 | struct spi_cs_info info; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 240 | struct udevice *dev; |
Bin Meng | 9741e73 | 2019-09-09 06:00:02 -0700 | [diff] [blame] | 241 | int ret; |
| 242 | |
| 243 | /* |
| 244 | * Ask the driver. For the moment we don't have CS info. |
| 245 | * When we do we could provide the driver with a helper function |
| 246 | * to figure out what chip selects are valid, or just handle the |
| 247 | * request. |
| 248 | */ |
| 249 | ops = spi_get_ops(bus); |
| 250 | if (ops->cs_info) { |
| 251 | ret = ops->cs_info(bus, cs, &info); |
| 252 | } else { |
| 253 | /* |
| 254 | * We could assume there is at least one valid chip select. |
| 255 | * The driver didn't care enough to tell us. |
| 256 | */ |
| 257 | ret = 0; |
| 258 | } |
| 259 | |
| 260 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 261 | dev_err(bus, "Invalid cs %d (err=%d)\n", cs, ret); |
Bin Meng | 9741e73 | 2019-09-09 06:00:02 -0700 | [diff] [blame] | 262 | return ret; |
| 263 | } |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 264 | |
| 265 | for (device_find_first_child(bus, &dev); dev; |
| 266 | device_find_next_child(&dev)) { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 267 | struct dm_spi_slave_plat *plat; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 268 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 269 | plat = dev_get_parent_plat(dev); |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 270 | dev_dbg(bus, "%s: plat=%p, cs=%d\n", __func__, plat, plat->cs); |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 271 | if (plat->cs == cs) { |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 272 | *devp = dev; |
| 273 | return 0; |
| 274 | } |
| 275 | } |
| 276 | |
| 277 | return -ENODEV; |
| 278 | } |
| 279 | |
| 280 | int spi_cs_is_valid(unsigned int busnum, unsigned int cs) |
| 281 | { |
| 282 | struct spi_cs_info info; |
| 283 | struct udevice *bus; |
| 284 | int ret; |
| 285 | |
Simon Glass | 07e1338 | 2020-12-16 21:20:29 -0700 | [diff] [blame] | 286 | ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, &bus); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 287 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 288 | log_debug("%s: No bus %d\n", __func__, busnum); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 289 | return ret; |
| 290 | } |
| 291 | |
| 292 | return spi_cs_info(bus, cs, &info); |
| 293 | } |
| 294 | |
| 295 | int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info) |
| 296 | { |
| 297 | struct spi_cs_info local_info; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 298 | int ret; |
| 299 | |
| 300 | if (!info) |
| 301 | info = &local_info; |
| 302 | |
| 303 | /* If there is a device attached, return it */ |
| 304 | info->dev = NULL; |
| 305 | ret = spi_find_chip_select(bus, cs, &info->dev); |
Bin Meng | 9741e73 | 2019-09-09 06:00:02 -0700 | [diff] [blame] | 306 | return ret == -ENODEV ? 0 : ret; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 307 | } |
| 308 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 309 | int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, |
| 310 | struct udevice **devp) |
| 311 | { |
| 312 | struct udevice *bus, *dev; |
| 313 | int ret; |
| 314 | |
Simon Glass | 07e1338 | 2020-12-16 21:20:29 -0700 | [diff] [blame] | 315 | ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, &bus); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 316 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 317 | log_debug("%s: No bus %d\n", __func__, busnum); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 318 | return ret; |
| 319 | } |
| 320 | ret = spi_find_chip_select(bus, cs, &dev); |
| 321 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 322 | dev_dbg(bus, "%s: No cs %d\n", __func__, cs); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 323 | return ret; |
| 324 | } |
| 325 | *busp = bus; |
| 326 | *devp = dev; |
| 327 | |
| 328 | return ret; |
| 329 | } |
| 330 | |
| 331 | int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, |
| 332 | const char *drv_name, const char *dev_name, |
| 333 | struct udevice **busp, struct spi_slave **devp) |
| 334 | { |
| 335 | struct udevice *bus, *dev; |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 336 | struct dm_spi_slave_plat *plat; |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 337 | struct dm_spi_bus *bus_data; |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 338 | struct spi_slave *slave; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 339 | bool created = false; |
| 340 | int ret; |
| 341 | |
Thomas Fitzsimmons | 59c90f3 | 2019-09-06 07:51:19 -0400 | [diff] [blame] | 342 | #if CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 343 | ret = uclass_first_device_err(UCLASS_SPI, &bus); |
| 344 | #else |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 345 | ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus); |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 346 | #endif |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 347 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 348 | log_err("Invalid bus %d (err=%d)\n", busnum, ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 349 | return ret; |
| 350 | } |
| 351 | ret = spi_find_chip_select(bus, cs, &dev); |
| 352 | |
| 353 | /* |
| 354 | * If there is no such device, create one automatically. This means |
| 355 | * that we don't need a device tree node or platform data for the |
| 356 | * SPI flash chip - we will bind to the correct driver. |
| 357 | */ |
| 358 | if (ret == -ENODEV && drv_name) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 359 | dev_dbg(bus, "%s: Binding new device '%s', busnum=%d, cs=%d, driver=%s\n", |
| 360 | __func__, dev_name, busnum, cs, drv_name); |
Simon Glass | d8a21f6 | 2014-11-11 10:46:23 -0700 | [diff] [blame] | 361 | ret = device_bind_driver(bus, drv_name, dev_name, &dev); |
Simon Glass | f0307e1 | 2016-11-13 14:22:05 -0700 | [diff] [blame] | 362 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 363 | dev_dbg(bus, "%s: Unable to bind driver (ret=%d)\n", |
| 364 | __func__, ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 365 | return ret; |
Simon Glass | f0307e1 | 2016-11-13 14:22:05 -0700 | [diff] [blame] | 366 | } |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 367 | plat = dev_get_parent_plat(dev); |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 368 | plat->cs = cs; |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 369 | if (speed) { |
| 370 | plat->max_hz = speed; |
| 371 | } else { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 372 | dev_warn(bus, |
| 373 | "Warning: SPI speed fallback to %u kHz\n", |
| 374 | SPI_DEFAULT_SPEED_HZ / 1000); |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 375 | plat->max_hz = SPI_DEFAULT_SPEED_HZ; |
| 376 | } |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 377 | plat->mode = mode; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 378 | created = true; |
| 379 | } else if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 380 | dev_err(bus, "Invalid chip select %d:%d (err=%d)\n", busnum, cs, ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 381 | return ret; |
| 382 | } |
| 383 | |
| 384 | if (!device_active(dev)) { |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 385 | struct spi_slave *slave; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 386 | |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 387 | ret = device_probe(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 388 | if (ret) |
| 389 | goto err; |
Simon Glass | de44acf | 2015-09-28 23:32:01 -0600 | [diff] [blame] | 390 | slave = dev_get_parent_priv(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 391 | slave->dev = dev; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 392 | } |
| 393 | |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 394 | slave = dev_get_parent_priv(dev); |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 395 | bus_data = dev_get_uclass_priv(bus); |
Patrick Delaunay | fa19c65 | 2019-02-27 15:36:44 +0100 | [diff] [blame] | 396 | |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 397 | /* |
| 398 | * In case the operation speed is not yet established by |
| 399 | * dm_spi_claim_bus() ensure the bus is configured properly. |
| 400 | */ |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 401 | if (!bus_data->speed) { |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 402 | ret = spi_claim_bus(slave); |
| 403 | if (ret) |
| 404 | goto err; |
Vignesh R | ae56979 | 2016-07-06 10:04:28 +0530 | [diff] [blame] | 405 | } |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 406 | |
| 407 | *busp = bus; |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 408 | *devp = slave; |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 409 | log_debug("%s: bus=%p, slave=%p\n", __func__, bus, *devp); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 410 | |
| 411 | return 0; |
| 412 | |
| 413 | err: |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 414 | log_debug("%s: Error path, created=%d, device '%s'\n", __func__, |
| 415 | created, dev->name); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 416 | if (created) { |
Stefan Roese | 80b5bc9 | 2017-03-20 12:51:48 +0100 | [diff] [blame] | 417 | device_remove(dev, DM_REMOVE_NORMAL); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 418 | device_unbind(dev); |
| 419 | } |
| 420 | |
| 421 | return ret; |
| 422 | } |
| 423 | |
| 424 | /* Compatibility function - to be removed */ |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 425 | struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, |
| 426 | unsigned int speed, unsigned int mode) |
| 427 | { |
| 428 | struct spi_slave *slave; |
| 429 | struct udevice *dev; |
| 430 | int ret; |
| 431 | |
| 432 | ret = spi_get_bus_and_cs(busnum, cs, speed, mode, NULL, 0, &dev, |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 433 | &slave); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 434 | if (ret) |
| 435 | return NULL; |
| 436 | |
| 437 | return slave; |
| 438 | } |
| 439 | |
| 440 | void spi_free_slave(struct spi_slave *slave) |
| 441 | { |
Stefan Roese | 80b5bc9 | 2017-03-20 12:51:48 +0100 | [diff] [blame] | 442 | device_remove(slave->dev, DM_REMOVE_NORMAL); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 443 | } |
| 444 | |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 445 | int spi_slave_of_to_plat(struct udevice *dev, struct dm_spi_slave_plat *plat) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 446 | { |
Jagan Teki | 96536b1 | 2016-08-08 17:12:12 +0530 | [diff] [blame] | 447 | int mode = 0; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 448 | int value; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 449 | |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 450 | plat->cs = dev_read_u32_default(dev, "reg", -1); |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 451 | plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency", |
| 452 | SPI_DEFAULT_SPEED_HZ); |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 453 | if (dev_read_bool(dev, "spi-cpol")) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 454 | mode |= SPI_CPOL; |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 455 | if (dev_read_bool(dev, "spi-cpha")) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 456 | mode |= SPI_CPHA; |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 457 | if (dev_read_bool(dev, "spi-cs-high")) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 458 | mode |= SPI_CS_HIGH; |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 459 | if (dev_read_bool(dev, "spi-3wire")) |
Jagan Teki | d3868fd | 2015-12-03 22:19:05 +0530 | [diff] [blame] | 460 | mode |= SPI_3WIRE; |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 461 | if (dev_read_bool(dev, "spi-half-duplex")) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 462 | mode |= SPI_PREAMBLE; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 463 | |
| 464 | /* Device DUAL/QUAD mode */ |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 465 | value = dev_read_u32_default(dev, "spi-tx-bus-width", 1); |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 466 | switch (value) { |
| 467 | case 1: |
| 468 | break; |
| 469 | case 2: |
| 470 | mode |= SPI_TX_DUAL; |
| 471 | break; |
| 472 | case 4: |
| 473 | mode |= SPI_TX_QUAD; |
| 474 | break; |
Vignesh Raghavendra | c063ee3 | 2019-12-05 15:46:05 +0530 | [diff] [blame] | 475 | case 8: |
| 476 | mode |= SPI_TX_OCTAL; |
| 477 | break; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 478 | default: |
Simon Glass | 6f5bed0 | 2016-11-29 20:00:13 -0700 | [diff] [blame] | 479 | warn_non_spl("spi-tx-bus-width %d not supported\n", value); |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 480 | break; |
| 481 | } |
| 482 | |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 483 | value = dev_read_u32_default(dev, "spi-rx-bus-width", 1); |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 484 | switch (value) { |
| 485 | case 1: |
| 486 | break; |
| 487 | case 2: |
Jagan Teki | 96536b1 | 2016-08-08 17:12:12 +0530 | [diff] [blame] | 488 | mode |= SPI_RX_DUAL; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 489 | break; |
| 490 | case 4: |
Jagan Teki | 96536b1 | 2016-08-08 17:12:12 +0530 | [diff] [blame] | 491 | mode |= SPI_RX_QUAD; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 492 | break; |
Vignesh Raghavendra | c063ee3 | 2019-12-05 15:46:05 +0530 | [diff] [blame] | 493 | case 8: |
| 494 | mode |= SPI_RX_OCTAL; |
| 495 | break; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 496 | default: |
Simon Glass | 6f5bed0 | 2016-11-29 20:00:13 -0700 | [diff] [blame] | 497 | warn_non_spl("spi-rx-bus-width %d not supported\n", value); |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 498 | break; |
| 499 | } |
| 500 | |
Jagan Teki | 96536b1 | 2016-08-08 17:12:12 +0530 | [diff] [blame] | 501 | plat->mode = mode; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 502 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 503 | return 0; |
| 504 | } |
| 505 | |
| 506 | UCLASS_DRIVER(spi) = { |
| 507 | .id = UCLASS_SPI, |
| 508 | .name = "spi", |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 509 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
Faiz Abbas | 8598c34 | 2020-09-14 12:11:14 +0530 | [diff] [blame] | 510 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | 1823034 | 2016-07-05 17:10:10 -0600 | [diff] [blame] | 511 | .post_bind = dm_scan_fdt_dev, |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 512 | #endif |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 513 | .post_probe = spi_post_probe, |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 514 | .child_pre_probe = spi_child_pre_probe, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 515 | .per_device_auto = sizeof(struct dm_spi_bus), |
| 516 | .per_child_auto = sizeof(struct spi_slave), |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 517 | .per_child_plat_auto = sizeof(struct dm_spi_slave_plat), |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 518 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 519 | .child_post_bind = spi_child_post_bind, |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 520 | #endif |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 521 | }; |
| 522 | |
| 523 | UCLASS_DRIVER(spi_generic) = { |
| 524 | .id = UCLASS_SPI_GENERIC, |
| 525 | .name = "spi_generic", |
| 526 | }; |
| 527 | |
| 528 | U_BOOT_DRIVER(spi_generic_drv) = { |
| 529 | .name = "spi_generic_drv", |
| 530 | .id = UCLASS_SPI_GENERIC, |
| 531 | }; |