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Stefan Agner7b852342018-05-30 19:01:48 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Marcel Ziswilera8576742019-04-09 17:24:15 +02003 * Copyright 2018-2019 Toradex AG
Stefan Agner7b852342018-05-30 19:01:48 +02004 *
5 * Configuration settings for the Colibri iMX6ULL module.
6 *
7 * based on colibri_imx7.h
8 */
9
10#ifndef __COLIBRI_IMX6ULL_CONFIG_H
11#define __COLIBRI_IMX6ULL_CONFIG_H
12
13#include "mx6_common.h"
14#define CONFIG_IOMUX_LPSR
15
Stefan Agner7b852342018-05-30 19:01:48 +020016#define PHYS_SDRAM_SIZE SZ_512M
17
18/* Size of malloc() pool */
19#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
20
21/* Network */
Stefan Agner7b852342018-05-30 19:01:48 +020022#define CONFIG_TFTP_TSIZE
23
24/* ENET1 */
25#define IMX_FEC_BASE ENET2_BASE_ADDR
26
Marcel Ziswilera8576742019-04-09 17:24:15 +020027/* MMC Config */
Stefan Agner7b852342018-05-30 19:01:48 +020028#define CONFIG_SYS_FSL_ESDHC_ADDR 0
29#define CONFIG_SYS_FSL_USDHC_NUM 1
30
Stefan Agner7b852342018-05-30 19:01:48 +020031/* I2C configs */
32#define CONFIG_SYS_I2C_SPEED 100000
33
34#define CONFIG_IPADDR 192.168.10.2
35#define CONFIG_NETMASK 255.255.255.0
36#define CONFIG_SERVERIP 192.168.10.1
37
38#define FDT_FILE "imx6ull-colibri${variant}-${fdt_board}.dtb"
39
40#define MEM_LAYOUT_ENV_SETTINGS \
41 "bootm_size=0x10000000\0" \
Stefan Agner4de45ca2019-04-09 17:24:10 +020042 "fdt_addr_r=0x82100000\0" \
Stefan Agner7b852342018-05-30 19:01:48 +020043 "fdt_high=0xffffffff\0" \
44 "initrd_high=0xffffffff\0" \
45 "kernel_addr_r=0x81000000\0" \
46 "pxefile_addr_r=0x87100000\0" \
Stefan Agner4de45ca2019-04-09 17:24:10 +020047 "ramdisk_addr_r=0x82200000\0" \
Stefan Agner7b852342018-05-30 19:01:48 +020048 "scriptaddr=0x87000000\0"
49
Igor Opaniukb130a722019-12-09 12:33:31 +020050#define UBOOT_UPDATE \
51 "update_uboot=nand erase.part u-boot1 && " \
52 "nand write ${loadaddr} u-boot1 ${filesize} && " \
53 "nand erase.part u-boot2 && " \
54 "nand write ${loadaddr} u-boot2 ${filesize}\0"
55
Stefan Agner7b852342018-05-30 19:01:48 +020056#define NFS_BOOTCMD \
57 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
58 "nfsboot=run setup; " \
59 "setenv bootargs ${defargs} ${nfsargs} " \
60 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
61 "dhcp ${kernel_addr_r} && " \
62 "tftp ${fdt_addr_r} " FDT_FILE " && " \
63 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
64
Stefan Agner7b852342018-05-30 19:01:48 +020065#define UBI_BOOTCMD \
66 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \
67 "ubi.fm_autoconvert=1\0" \
68 "ubiboot=run setup; " \
69 "setenv bootargs ${defargs} ${ubiargs} " \
70 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
71 "ubi part ubi &&" \
72 "ubi read ${kernel_addr_r} kernel && " \
73 "ubi read ${fdt_addr_r} dtb && " \
74 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
75
76#define CONFIG_BOOTCOMMAND "run ubiboot; " \
77 "setenv fdtfile " FDT_FILE " && run distro_bootcmd;"
78
79#define BOOT_TARGET_DEVICES(func) \
80 func(MMC, mmc, 0) \
81 func(USB, usb, 0) \
82 func(DHCP, dhcp, na)
83#include <config_distro_bootcmd.h>
84
85#define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5"
86
87#define CONFIG_EXTRA_ENV_SETTINGS \
88 BOOTENV \
89 MEM_LAYOUT_ENV_SETTINGS \
90 NFS_BOOTCMD \
Stefan Agner7b852342018-05-30 19:01:48 +020091 UBI_BOOTCMD \
Igor Opaniukb130a722019-12-09 12:33:31 +020092 UBOOT_UPDATE \
Stefan Agner7b852342018-05-30 19:01:48 +020093 "console=ttymxc0\0" \
94 "defargs=user_debug=30\0" \
95 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
96 "fdt_board=eval-v3\0" \
97 "fdt_fixup=;\0" \
98 "ip_dyn=yes\0" \
99 "kernel_file=zImage\0" \
Tom Rini6b781162018-07-23 10:51:13 -0400100 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Stefan Agner7b852342018-05-30 19:01:48 +0200101 "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
102 "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
103 "${board}/flash_eth.img && source ${loadaddr}\0" \
104 "setsdupdate=mmc rescan && setenv interface mmc && " \
105 "fatload ${interface} 0:1 ${loadaddr} " \
106 "${board}/flash_blk.img && source ${loadaddr}\0" \
107 "setup=setenv setupargs " \
108 "console=tty1 console=${console}" \
109 ",${baudrate}n8 ${memargs} consoleblank=0\0" \
110 "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
111 "setusbupdate=usb start && setenv interface usb && " \
112 "fatload ${interface} 0:1 ${loadaddr} " \
113 "${board}/flash_blk.img && source ${loadaddr}\0" \
114 "splashpos=m,m\0" \
115 "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
Marcel Ziswiler85d0a172019-07-10 09:42:38 +0200116 "vidargs=video=mxsfb:640x480M-16@60"
Stefan Agner7b852342018-05-30 19:01:48 +0200117
118#define CONFIG_SYS_MEMTEST_START 0x80000000
119#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x08000000)
120
121#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
122
123/* Physical Memory Map */
Stefan Agner7b852342018-05-30 19:01:48 +0200124#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
125
126#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
127#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
128#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
129
130#define CONFIG_SYS_INIT_SP_OFFSET \
131 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
132#define CONFIG_SYS_INIT_SP_ADDR \
133 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
134
Stefan Agner7b852342018-05-30 19:01:48 +0200135/* NAND stuff */
136#define CONFIG_SYS_MAX_NAND_DEVICE 1
137/* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */
138#define CONFIG_SYS_NAND_BASE -1
139#define CONFIG_SYS_NAND_ONFI_DETECTION
Stefan Agner7b852342018-05-30 19:01:48 +0200140
Stefan Agner7b852342018-05-30 19:01:48 +0200141/* USB Configs */
142#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
143
144#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
145#define CONFIG_MXC_USB_FLAGS 0
146#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
147
148#define CONFIG_IMX_THERMAL
149
150#define CONFIG_USBD_HS
151
152/* USB Device Firmware Update support */
153#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
154#define DFU_DEFAULT_POLL_TIMEOUT 300
155
Igor Opaniuka2ac2aa2019-06-19 11:47:08 +0300156#if defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO)
Stefan Agner7b852342018-05-30 19:01:48 +0200157#define CONFIG_VIDEO_MXS
158#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
159#define CONFIG_VIDEO_LOGO
160#define CONFIG_SPLASH_SCREEN
161#define CONFIG_SPLASH_SCREEN_ALIGN
162#define CONFIG_BMP_16BPP
163#define CONFIG_VIDEO_BMP_RLE8
164#define CONFIG_VIDEO_BMP_LOGO
165#endif
166
Marcel Ziswilera8576742019-04-09 17:24:15 +0200167#endif /* __COLIBRI_IMX6ULL_CONFIG_H */