Svyatoslav Ryhel | 1d91d5d | 2025-02-16 19:09:31 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Test for video bridge uclass |
| 4 | * |
| 5 | * Copyright (c) 2025 Svyatoslav Ryhel <clamor95@gmail.com> |
| 6 | */ |
| 7 | |
| 8 | #include <backlight.h> |
| 9 | #include <dm.h> |
| 10 | #include <panel.h> |
| 11 | #include <video.h> |
| 12 | #include <video_bridge.h> |
| 13 | #include <asm/gpio.h> |
| 14 | #include <asm/test.h> |
| 15 | #include <dm/test.h> |
| 16 | #include <power/regulator.h> |
| 17 | #include <test/test.h> |
| 18 | #include <test/ut.h> |
| 19 | |
| 20 | /* Basic test of the video uclass, test is based on driven panel */ |
| 21 | static int dm_test_video_bridge(struct unit_test_state *uts) |
| 22 | { |
| 23 | struct udevice *dev, *pwm, *gpio, *reg; |
| 24 | uint period_ns, duty_ns; |
| 25 | bool enable, polarity; |
| 26 | struct display_timing timing; |
| 27 | |
| 28 | ut_assertok(uclass_first_device_err(UCLASS_VIDEO_BRIDGE, &dev)); |
| 29 | ut_assertok(uclass_get_device_by_name(UCLASS_PWM, "pwm", &pwm)); |
| 30 | ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio)); |
| 31 | ut_assertok(regulator_get_by_platname("VDD_EMMC_1.8V", ®)); |
| 32 | ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, |
| 33 | &enable, &polarity)); |
| 34 | ut_asserteq(false, enable); |
| 35 | ut_asserteq(true, regulator_get_enable(reg)); |
| 36 | |
| 37 | /* bridge calls panel_enable_backlight() of panel */ |
| 38 | ut_assertok(video_bridge_attach(dev)); |
| 39 | ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, |
| 40 | &enable, &polarity)); |
| 41 | ut_asserteq(1000, period_ns); |
| 42 | ut_asserteq(170 * 1000 / 255, duty_ns); |
| 43 | ut_asserteq(true, enable); |
| 44 | ut_asserteq(false, polarity); |
| 45 | ut_asserteq(1, sandbox_gpio_get_value(gpio, 1)); |
| 46 | ut_asserteq(true, regulator_get_enable(reg)); |
| 47 | |
| 48 | /* bridge calls panel_set_backlight() of panel */ |
| 49 | ut_assertok(video_bridge_set_backlight(dev, BACKLIGHT_DEFAULT)); |
| 50 | ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns, |
| 51 | &enable, &polarity)); |
| 52 | ut_asserteq(true, enable); |
| 53 | ut_asserteq(170 * 1000 / 255, duty_ns); |
| 54 | |
| 55 | /* bridge should be active */ |
| 56 | ut_assertok(video_bridge_set_active(dev, true)); |
| 57 | |
| 58 | /* bridge is internal and has no hotplug gpio */ |
| 59 | ut_asserteq(-ENOENT, video_bridge_check_attached(dev)); |
| 60 | |
| 61 | /* check passing timings and EDID */ |
| 62 | ut_assertok(video_bridge_get_display_timing(dev, &timing)); |
| 63 | ut_assertok(video_bridge_read_edid(dev, NULL, 0)); |
| 64 | |
| 65 | return 0; |
| 66 | } |
| 67 | DM_TEST(dm_test_video_bridge, UTF_SCAN_PDATA | UTF_SCAN_FDT); |