blob: 328fd3974b1b64d4f517343fcbd3145d49044ea1 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk0aeb8532004-10-10 21:21:55 +00002/*
3 * Copyright 2004 Freescale Semiconductor.
wdenk0aeb8532004-10-10 21:21:55 +00004 */
5
6#ifndef __EEPROM_H_
7#define __EEPROM_H_
8
9
10/*
11 * EEPROM Board System Register interface.
12 */
13
14
15/*
16 * CPU Board Revision
17 */
18#define MPC85XX_CPU_BOARD_REV(maj, min) ((((maj)&0xff) << 8) | ((min) & 0xff))
19#define MPC85XX_CPU_BOARD_MAJOR(rev) (((rev) >> 8) & 0xff)
20#define MPC85XX_CPU_BOARD_MINOR(rev) ((rev) & 0xff)
21
22#define MPC85XX_CPU_BOARD_REV_UNKNOWN MPC85XX_CPU_BOARD_REV(0,0)
23#define MPC85XX_CPU_BOARD_REV_1_0 MPC85XX_CPU_BOARD_REV(1,0)
24#define MPC85XX_CPU_BOARD_REV_1_1 MPC85XX_CPU_BOARD_REV(1,1)
25
26/*
27 * Returns CPU board revision register as a 16-bit value with
28 * the Major in the high byte, and Minor in the low byte.
29 */
30extern unsigned int get_cpu_board_revision(void);
31
32
33#endif /* __CADMUS_H_ */