blob: fb8fe386fc8755d9adc3210ecfa85c91529b007f [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Michal Simek6455ac02007-05-05 18:27:16 +02002/*
3 * (C) Copyright 2007 Michal Simek
4 *
5 * Michal SIMEK <monstr@monstr.eu>
Michal Simek6455ac02007-05-05 18:27:16 +02006 */
7
8/* FSL macros */
9#define NGET(val, fslnum) \
10 __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
Michal Simekee1aced2007-05-08 14:39:11 +020011
Michal Simek6455ac02007-05-05 18:27:16 +020012#define GET(val, fslnum) \
13 __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
Michal Simekee1aced2007-05-08 14:39:11 +020014
15#define NCGET(val, fslnum) \
16 __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
17
18#define CGET(val, fslnum) \
19 __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
20
Michal Simek6455ac02007-05-05 18:27:16 +020021#define NPUT(val, fslnum) \
22 __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
Michal Simekee1aced2007-05-08 14:39:11 +020023
Michal Simek6455ac02007-05-05 18:27:16 +020024#define PUT(val, fslnum) \
25 __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
Michal Simek603aa742007-05-07 17:11:09 +020026
Michal Simekee1aced2007-05-08 14:39:11 +020027#define NCPUT(val, fslnum) \
28 __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
29
30#define CPUT(val, fslnum) \
31 __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
32
Michal Simek6455ac02007-05-05 18:27:16 +020033/* CPU dependent */
Michal Simek3af398e2007-05-08 14:52:52 +020034/* machine status register */
Michal Simekebf7b232007-05-08 15:57:43 +020035#define MFS(val, reg) \
36 __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
Michal Simek603aa742007-05-07 17:11:09 +020037
Michal Simekebf7b232007-05-08 15:57:43 +020038#define MTS(val, reg) \
39 __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
Michal Simek3af398e2007-05-08 14:52:52 +020040
Michal Simek98c19792007-05-07 23:58:31 +020041/* get return address from interrupt */
Michal Simek603aa742007-05-07 17:11:09 +020042#define R14(val) \
43 __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
Michal Simek98c19792007-05-07 23:58:31 +020044
Michal Simek924819c2015-01-26 14:32:23 +010045/* get return address from interrupt */
46#define R17(val) \
47 __asm__ __volatile__ ("addi %0, r17, 0" : "=r" (val));
48
Michal Simekebf7b232007-05-08 15:57:43 +020049#define NOP __asm__ __volatile__ ("nop");
50
Michal Simek98c19792007-05-07 23:58:31 +020051/* use machine status registe USE_MSR_REG */
Michal Simek731e0f92016-05-24 11:45:11 +020052#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 1
Michal Simek98c19792007-05-07 23:58:31 +020053#define MSRSET(val) \
54 __asm__ __volatile__ ("msrset r0," #val );
55
56#define MSRCLR(val) \
57 __asm__ __volatile__ ("msrclr r0," #val );
58
59#else
60#define MSRSET(val) \
61{ \
62 register unsigned tmp; \
63 __asm__ __volatile__ (" \
Wolfgang Denka1be4762008-05-20 16:00:29 +020064 mfs %0, rmsr; \
Michal Simek98c19792007-05-07 23:58:31 +020065 ori %0, %0, "#val"; \
66 mts rmsr, %0; \
67 nop;" \
68 : "=r" (tmp) \
69 : "d" (val) \
70 : "memory"); \
71}
72
73#define MSRCLR(val) \
74{ \
75 register unsigned tmp; \
76 __asm__ __volatile__ (" \
Wolfgang Denka1be4762008-05-20 16:00:29 +020077 mfs %0, rmsr; \
Michal Simek98c19792007-05-07 23:58:31 +020078 andi %0, %0, ~"#val"; \
79 mts rmsr, %0; \
80 nop;" \
81 : "=r" (tmp) \
82 : "d" (val) \
83 : "memory"); \
84}
85#endif