blob: d91d46b5898f17b5a7ca9a3573b0491979617038 [file] [log] [blame]
Jagan Teki2bd82cf2019-12-30 17:34:06 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Jacopo Mondi <jacopo@jmondi.org>
4 */
5
6#include "imx6qdl-icore.dtsi"
7
8&iomuxc {
9 pinctrl_enet: enetgrp {
10 fsl,pins = <
11 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
12 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0b0
13 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
14 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
15 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
16 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
17 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
18 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
19 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
20 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
21 >;
22 };
23};
24
25&fec {
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_enet>;
28 phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
29 clocks = <&clks IMX6QDL_CLK_ENET>,
30 <&clks IMX6QDL_CLK_ENET>,
31 <&clks IMX6QDL_CLK_ENET_REF>;
32 phy-mode = "rmii";
33 status = "okay";
34};