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git01.mediatek.com / filogic / uboot / 2b9c1d1b90626e0a7d65cea1f85d094ed0c5ad61 / . / include / smiLynxEM.h
blob: 017964b3e7b3a163c2191aaf21789ed7a045fd5d [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +0000[diff] [blame]1/*
2 * (C) Copyright 1997-2002 ELTEC Elektronik AG
3 * Frank Gottschling <fgottschling@eltec.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * smiLynxEM.h
26 * Silicon Motion graphic interface for sm810/sm710/sm712 accelerator
27 *
28 *
29 * modification history
30 * --------------------
31 * 04-18-2002 Rewritten for U-Boot <fgottschling@eltec.de>.
32 */
33
34#ifndef _SMI_LYNX_EM_H_
35#define _SMI_LYNX_EM_H_
36
37/*
38 * SMI 710/712 have 4MB internal RAM; SMI 810 2MB internal + 2MB external
39 */
40#define VIDEO_MEM_SIZE 0x400000
41
42/*
43 * Supported video modes for SMI Lynx E/EM/EM+
44 */
45#define VIDEO_MODES 7
46#define DUAL_800_600 0 /* SMI710:VGA1:75Hz (pitch=1600) */
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]47 /* VGA2:60/120Hz (pitch=1600) */
48 /* SMI810:VGA1:75Hz (pitch=1600) */
49 /* VGA2:75Hz (pitch=1600) */
wdenkc6097192002-11-03 00:24:07 +0000[diff] [blame]50#define DUAL_1024_768 1 /* VGA1:75Hz VGA2:73Hz (pitch=2048) */
51#define SINGLE_800_600 2 /* VGA1:75Hz (pitch=800) */
52#define SINGLE_1024_768 3 /* VGA1:75Hz (pitch=1024) */
53#define SINGLE_1280_1024 4 /* VGA1:75Hz (pitch=1280) */
54#define TV_MODE_CCIR 5 /* VGA1:50Hz (h=720;v=576;pitch=720) */
55#define TV_MODE_EIA 6 /* VGA1:60Hz (h=720;v=484;pitch=720) */
56
57
58/*
59 * ISA mapped regs
60 */
61#define SMI_INDX_C4 (pGD->isaBase + 0x03c4) /* index reg */
62#define SMI_DATA_C5 (pGD->isaBase + 0x03c5) /* data reg */
63#define SMI_INDX_D4 (pGD->isaBase + 0x03d4) /* index reg */
64#define SMI_DATA_D5 (pGD->isaBase + 0x03d5) /* data reg */
65#define SMI_INDX_CE (pGD->isaBase + 0x03ce) /* index reg */
66#define SMI_DATA_CF (pGD->isaBase + 0x03cf) /* data reg */
67#define SMI_LOCK_REG (pGD->isaBase + 0x03c3) /* unlock/lock ext crt reg */
68#define SMI_MISC_REG (pGD->isaBase + 0x03c2) /* misc reg */
69#define SMI_LUT_MASK (pGD->isaBase + 0x03c6) /* lut mask reg */
70#define SMI_LUT_START (pGD->isaBase + 0x03c8) /* lut start index */
71#define SMI_LUT_RGB (pGD->isaBase + 0x03c9) /* lut colors auto incr.*/
72
73
74/*
75 * Video processor control
76 */
77typedef struct {
78 unsigned int control;
79 unsigned int colorKey;
80 unsigned int colorKeyMask;
81 unsigned int start;
82 unsigned short offset;
83 unsigned short width;
84 unsigned int fifoPrio;
85 unsigned int fifoERL;
86 unsigned int YUVtoRGB;
87} SmiVideoProc;
88
89/*
90 * Video window control
91 */
92typedef struct {
93 unsigned short top;
94 unsigned short left;
95 unsigned short bottom;
96 unsigned short right;
97 unsigned int srcStart;
98 unsigned short width;
99 unsigned short offset;
100 unsigned char hStretch;
101 unsigned char vStretch;
102} SmiVideoWin;
103
104/*
105 * Capture port control
106 */
107typedef struct {
108 unsigned int control;
109 unsigned short topClip;
110 unsigned short leftClip;
111 unsigned short srcHeight;
112 unsigned short srcWidth;
113 unsigned int srcBufStart1;
114 unsigned int srcBufStart2;
115 unsigned short srcOffset;
116 unsigned short fifoControl;
117} SmiCapturePort;
118
119
120/******************************************************************************/
121/* Export Graphic Driver Control */
122/******************************************************************************/
123
124typedef struct {
125 unsigned int isaBase;
126 unsigned int pciBase;
127 unsigned int dprBase;
128 unsigned int vprBase;
129 unsigned int cprBase;
130 unsigned int frameAdrs;
131 unsigned int memSize;
132 unsigned int mode;
133 unsigned int gdfIndex;
134 unsigned int gdfBytesPP;
135 unsigned int fg;
136 unsigned int bg;
137 unsigned int plnSizeX;
138 unsigned int plnSizeY;
139 unsigned int winSizeX;
140 unsigned int winSizeY;
141 char modeIdent[80];
142} GraphicDevice;
143
144extern GraphicDevice smi;
145
146
147/******************************************************************************/
148/* Export Graphic Functions */
149/******************************************************************************/
150
151void *video_hw_init (void); /* returns GraphicDevice struct or NULL */
152
153void video_hw_bitblt (
154 unsigned int bpp, /* bytes per pixel */
155 unsigned int src_x, /* source pos x */
156 unsigned int src_y, /* source pos y */
157 unsigned int dst_x, /* dest pos x */
158 unsigned int dst_y, /* dest pos y */
159 unsigned int dim_x, /* frame width */
160 unsigned int dim_y /* frame height */
161 );
162
163void video_hw_rectfill (
164 unsigned int bpp, /* bytes per pixel */
165 unsigned int dst_x, /* dest pos x */
166 unsigned int dst_y, /* dest pos y */
167 unsigned int dim_x, /* frame width */
168 unsigned int dim_y, /* frame height */
169 unsigned int color /* fill color */
170 );
171
172void video_set_lut (
173 unsigned int index, /* color number */
174 unsigned char r, /* red */
175 unsigned char g, /* green */
176 unsigned char b /* blue */
177 );
178
179#endif /*_SMI_LYNX_EM_H_ */