Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Michael Schwingen, michael@schwingen.org |
| 4 | * |
| 5 | * Configuration settings for the AcTux-4 board. |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef __CONFIG_H |
| 27 | #define __CONFIG_H |
| 28 | |
| 29 | #define CONFIG_IXP425 1 |
| 30 | #define CONFIG_ACTUX4 1 |
| 31 | |
Marek Vasut | f0ed2fb | 2012-03-06 00:45:35 +0100 | [diff] [blame] | 32 | #define CONFIG_MACH_TYPE 1532 |
| 33 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 34 | #define CONFIG_DISPLAY_CPUINFO 1 |
| 35 | #define CONFIG_DISPLAY_BOARDINFO 1 |
| 36 | |
Jean-Christophe PLAGNIOL-VILLARD | 08cae4d | 2009-01-31 09:10:48 +0100 | [diff] [blame] | 37 | #define CONFIG_IXP_SERIAL |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 38 | #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 39 | #define CONFIG_BAUDRATE 115200 |
| 40 | #define CONFIG_BOOTDELAY 3 |
| 41 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 42 | #define CONFIG_BOARD_EARLY_INIT_F 1 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 43 | |
| 44 | /*************************************************************** |
| 45 | * U-boot generic defines start here. |
| 46 | ***************************************************************/ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 47 | /* Size of malloc() pool */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 48 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 49 | |
| 50 | /* allow to overwrite serial and ethaddr */ |
| 51 | #define CONFIG_ENV_OVERWRITE |
| 52 | |
| 53 | /* Command line configuration */ |
| 54 | #include <config_cmd_default.h> |
| 55 | |
| 56 | #define CONFIG_CMD_ELF |
| 57 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 58 | #define CONFIG_PCI |
| 59 | #ifdef CONFIG_PCI |
| 60 | #define CONFIG_CMD_PCI |
| 61 | #define CONFIG_PCI_PNP |
| 62 | #define CONFIG_IXP_PCI |
| 63 | #define CONFIG_PCI_SCAN_SHOW |
| 64 | #define CONFIG_CMD_PCI_ENUM |
| 65 | #endif |
| 66 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 67 | #define CONFIG_BOOTCOMMAND "run boot_flash" |
| 68 | /* enable passing of ATAGs */ |
| 69 | #define CONFIG_CMDLINE_TAG 1 |
| 70 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 71 | #define CONFIG_INITRD_TAG 1 |
| 72 | |
| 73 | #if defined(CONFIG_CMD_KGDB) |
| 74 | # define CONFIG_KGDB_BAUDRATE 230400 |
| 75 | /* which serial port to use */ |
| 76 | # define CONFIG_KGDB_SER_INDEX 1 |
| 77 | #endif |
| 78 | |
| 79 | /* Miscellaneous configurable options */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 80 | #define CONFIG_SYS_LONGHELP |
| 81 | #define CONFIG_SYS_PROMPT "=> " |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 82 | /* Console I/O Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 83 | #define CONFIG_SYS_CBSIZE 256 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 84 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 86 | /* max number of command args */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 87 | #define CONFIG_SYS_MAXARGS 16 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 88 | /* Boot Argument Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 90 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_MEMTEST_START 0x00400000 |
| 92 | #define CONFIG_SYS_MEMTEST_END 0x00800000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 93 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 94 | /* timer clock - 2* OSC_IN system clock */ |
| 95 | #define CONFIG_IXP425_TIMER_CLK 66000000 |
| 96 | #define CONFIG_SYS_HZ 1000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 97 | |
| 98 | /* default load address */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | #define CONFIG_SYS_LOAD_ADDR 0x00010000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 100 | |
| 101 | /* valid baudrates */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 102 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 103 | 115200, 230400 } |
| 104 | #define CONFIG_SERIAL_RTS_ACTIVE 1 |
| 105 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 106 | /* Expansion bus settings */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 107 | #define CONFIG_SYS_EXP_CS0 0xbd113003 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 108 | |
| 109 | /* SDRAM settings */ |
| 110 | #define CONFIG_NR_DRAM_BANKS 1 |
| 111 | #define PHYS_SDRAM_1 0x00000000 |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 112 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 113 | |
| 114 | /* 32MB SDRAM */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 115 | #define CONFIG_SYS_SDR_CONFIG 0x18 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 116 | #define PHYS_SDRAM_1_SIZE 0x02000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a |
| 118 | #define CONFIG_SYS_SDR_MODE_CONFIG 0x1 |
| 119 | #define CONFIG_SYS_DRAM_SIZE 0x02000000 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 120 | |
| 121 | /* FLASH organization */ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 122 | #define CONFIG_SYS_TEXT_BASE 0x50000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 123 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 124 | /* max # of sectors per chip */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 125 | #define CONFIG_SYS_MAX_FLASH_SECT 70 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 126 | #define PHYS_FLASH_1 0x50000000 |
| 127 | #define PHYS_FLASH_2 0x51000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 128 | #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 129 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| 131 | #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 |
| 132 | #define CONFIG_SYS_MONITOR_LEN (252 << 10) |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 133 | #define CONFIG_BOARD_SIZE_LIMIT 258048 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 134 | |
| 135 | /* Use common CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 136 | #define CONFIG_SYS_FLASH_CFI |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 137 | #define CONFIG_FLASH_CFI_DRIVER |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 138 | /* board provides its own flash_init code */ |
| 139 | #define CONFIG_FLASH_CFI_LEGACY 1 |
| 140 | /* no byte writes on IXP4xx */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 142 | /* SST 39VF020 etc. support */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 143 | #define CONFIG_SYS_FLASH_LEGACY_256Kx8 1 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 144 | |
| 145 | /* print 'E' for empty sector on flinfo */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 147 | |
| 148 | /* Ethernet */ |
| 149 | |
| 150 | /* include IXP4xx NPE support */ |
| 151 | #define CONFIG_IXP4XX_NPE 1 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 152 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 153 | /* NPE0 PHY address */ |
| 154 | #define CONFIG_PHY_ADDR 0x1C |
| 155 | /* MII PHY management */ |
| 156 | #define CONFIG_MII 1 |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 157 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 158 | /* Number of ethernet rx buffers & descriptors */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 159 | #define CONFIG_SYS_RX_ETH_BUFFER 16 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 160 | |
| 161 | #define CONFIG_CMD_DHCP |
| 162 | #define CONFIG_CMD_NET |
| 163 | #define CONFIG_CMD_MII |
| 164 | #define CONFIG_CMD_PING |
| 165 | #undef CONFIG_CMD_NFS |
| 166 | |
| 167 | /* BOOTP options */ |
| 168 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 169 | #define CONFIG_BOOTP_BOOTPATH |
| 170 | #define CONFIG_BOOTP_GATEWAY |
| 171 | #define CONFIG_BOOTP_HOSTNAME |
| 172 | |
| 173 | /* Cache Configuration */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 174 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 175 | |
| 176 | /* environment organization: one complete 4k flash sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 177 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 178 | #define CONFIG_ENV_SIZE 0x1000 |
| 179 | #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000) |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 180 | |
| 181 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Jean-Christophe PLAGNIOL-VILLARD | 1948d6c | 2009-01-31 09:53:39 +0100 | [diff] [blame] | 182 | "npe_ucode=51000000\0" \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 183 | "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ |
| 184 | "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ |
| 185 | "kerneladdr=51020000\0" \ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 186 | "kernelfile=actux4/uImage\0" \ |
| 187 | "rootfile=actux4/rootfs\0" \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 188 | "rootaddr=51160000\0" \ |
| 189 | "loadaddr=10000\0" \ |
| 190 | "updateboot_ser=mw.b 10000 ff 40000;" \ |
| 191 | " loady ${loadaddr};" \ |
| 192 | " run eraseboot writeboot\0" \ |
| 193 | "updateboot_net=mw.b 10000 ff 40000;" \ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 194 | " tftp ${loadaddr} actux4/u-boot.bin;" \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 195 | " run eraseboot writeboot\0" \ |
| 196 | "eraseboot=protect off 50000000 5003efff;" \ |
| 197 | " erase 50000000 +${filesize}\0" \ |
| 198 | "writeboot=cp.b 10000 50000000 ${filesize}\0" \ |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 199 | "updateucode=loady;" \ |
| 200 | " era ${npe_ucode} +${filesize};" \ |
| 201 | " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 202 | "updateroot=tftp ${loadaddr} ${rootfile};" \ |
| 203 | " era ${rootaddr} +${filesize};" \ |
| 204 | " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ |
| 205 | "updatekern=tftp ${loadaddr} ${kernelfile};" \ |
| 206 | " era ${kerneladdr} +${filesize};" \ |
| 207 | " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ |
| 208 | "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ |
| 209 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ |
| 210 | "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ |
| 211 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ |
| 212 | "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ |
| 213 | "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ |
| 214 | "boot_flash=run flashargs addtty addeth;" \ |
| 215 | " bootm ${kerneladdr}\0" \ |
| 216 | "boot_net=run netargs addtty addeth;" \ |
| 217 | " tftpboot ${loadaddr} ${kernelfile};" \ |
| 218 | " bootm\0" |
| 219 | |
Michael Schwingen | 67ea3d9 | 2011-05-23 00:00:07 +0200 | [diff] [blame] | 220 | /* additions for new relocation code, must be added to all boards */ |
| 221 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 222 | (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) |
| 223 | |
Michael Schwingen | 06a9e12 | 2008-01-16 19:53:23 +0100 | [diff] [blame] | 224 | #endif /* __CONFIG_H */ |