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Eugen Hristev32f36cf2023-02-22 11:05:12 +02001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
Eugen Hristev72d61d12023-05-29 10:34:23 +03005#include <dt-bindings/gpio/gpio.h>
Eugen Hristev32f36cf2023-02-22 11:05:12 +02006#include "rk3588.dtsi"
7
8/ {
9 model = "Radxa ROCK 5 Model B";
10 compatible = "radxa,rock-5b", "rockchip,rk3588";
11
12 aliases {
13 mmc0 = &sdhci;
FUKAUMI Naoki61315172023-09-05 20:47:35 +090014 mmc1 = &sdmmc;
Eugen Hristev32f36cf2023-02-22 11:05:12 +020015 serial2 = &uart2;
16 };
17
18 chosen {
19 stdout-path = "serial2:1500000n8";
20 };
21
FUKAUMI Naoki61315172023-09-05 20:47:35 +090022 analog-sound {
Eugen Hristev72d61d12023-05-29 10:34:23 +030023 compatible = "audio-graph-card";
FUKAUMI Naoki61315172023-09-05 20:47:35 +090024 label = "rk3588-es8316";
Eugen Hristev72d61d12023-05-29 10:34:23 +030025
26 widgets = "Microphone", "Mic Jack",
27 "Headphone", "Headphones";
28
29 routing = "MIC2", "Mic Jack",
30 "Headphones", "HPOL",
31 "Headphones", "HPOR";
32
33 dais = <&i2s0_8ch_p0>;
34 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&hp_detect>;
37 };
38
FUKAUMI Naoki61315172023-09-05 20:47:35 +090039 fan: pwm-fan {
40 compatible = "pwm-fan";
41 cooling-levels = <0 95 145 195 255>;
42 fan-supply = <&vcc5v0_sys>;
43 pwms = <&pwm1 0 50000 0>;
44 #cooling-cells = <2>;
45 };
46
47 vcc5v0_host: vcc5v0-host-regulator {
48 compatible = "regulator-fixed";
49 regulator-name = "vcc5v0_host";
50 regulator-boot-on;
51 regulator-always-on;
52 regulator-min-microvolt = <5000000>;
53 regulator-max-microvolt = <5000000>;
54 enable-active-high;
55 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
56 pinctrl-names = "default";
57 pinctrl-0 = <&vcc5v0_host_en>;
58 vin-supply = <&vcc5v0_sys>;
59 };
60
Eugen Hristev32f36cf2023-02-22 11:05:12 +020061 vcc5v0_sys: vcc5v0-sys-regulator {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc5v0_sys";
64 regulator-always-on;
65 regulator-boot-on;
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
68 };
FUKAUMI Naoki61315172023-09-05 20:47:35 +090069
70 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
71 compatible = "regulator-fixed";
72 regulator-name = "vcc_1v1_nldo_s3";
73 regulator-always-on;
74 regulator-boot-on;
75 regulator-min-microvolt = <1100000>;
76 regulator-max-microvolt = <1100000>;
77 vin-supply = <&vcc5v0_sys>;
78 };
Eugen Hristev32f36cf2023-02-22 11:05:12 +020079};
80
Eugen Hristev72d61d12023-05-29 10:34:23 +030081&cpu_b0 {
82 cpu-supply = <&vdd_cpu_big0_s0>;
83};
84
85&cpu_b1 {
86 cpu-supply = <&vdd_cpu_big0_s0>;
87};
88
89&cpu_b2 {
90 cpu-supply = <&vdd_cpu_big1_s0>;
91};
92
93&cpu_b3 {
94 cpu-supply = <&vdd_cpu_big1_s0>;
95};
96
FUKAUMI Naoki61315172023-09-05 20:47:35 +090097&cpu_l0 {
98 cpu-supply = <&vdd_cpu_lit_s0>;
99};
100
101&cpu_l1 {
102 cpu-supply = <&vdd_cpu_lit_s0>;
103};
104
105&cpu_l2 {
106 cpu-supply = <&vdd_cpu_lit_s0>;
107};
108
109&cpu_l3 {
110 cpu-supply = <&vdd_cpu_lit_s0>;
111};
112
Eugen Hristev72d61d12023-05-29 10:34:23 +0300113&i2c0 {
114 pinctrl-names = "default";
115 pinctrl-0 = <&i2c0m2_xfer>;
116 status = "okay";
117
118 vdd_cpu_big0_s0: regulator@42 {
119 compatible = "rockchip,rk8602";
120 reg = <0x42>;
121 fcs,suspend-voltage-selector = <1>;
122 regulator-name = "vdd_cpu_big0_s0";
123 regulator-always-on;
124 regulator-boot-on;
125 regulator-min-microvolt = <550000>;
126 regulator-max-microvolt = <1050000>;
127 regulator-ramp-delay = <2300>;
128 vin-supply = <&vcc5v0_sys>;
129
130 regulator-state-mem {
131 regulator-off-in-suspend;
132 };
133 };
134
135 vdd_cpu_big1_s0: regulator@43 {
136 compatible = "rockchip,rk8603", "rockchip,rk8602";
137 reg = <0x43>;
138 fcs,suspend-voltage-selector = <1>;
139 regulator-name = "vdd_cpu_big1_s0";
140 regulator-always-on;
141 regulator-boot-on;
142 regulator-min-microvolt = <550000>;
143 regulator-max-microvolt = <1050000>;
144 regulator-ramp-delay = <2300>;
145 vin-supply = <&vcc5v0_sys>;
146
147 regulator-state-mem {
148 regulator-off-in-suspend;
149 };
150 };
151};
152
153&i2c6 {
154 status = "okay";
155
156 hym8563: rtc@51 {
157 compatible = "haoyu,hym8563";
158 reg = <0x51>;
159 #clock-cells = <0>;
160 clock-output-names = "hym8563";
161 pinctrl-names = "default";
162 pinctrl-0 = <&hym8563_int>;
163 interrupt-parent = <&gpio0>;
164 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
165 wakeup-source;
166 };
167};
168
169&i2c7 {
170 status = "okay";
171
172 es8316: audio-codec@11 {
173 compatible = "everest,es8316";
174 reg = <0x11>;
175 clocks = <&cru I2S0_8CH_MCLKOUT>;
176 clock-names = "mclk";
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900177 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
178 assigned-clock-rates = <12288000>;
Eugen Hristev72d61d12023-05-29 10:34:23 +0300179 #sound-dai-cells = <0>;
180
181 port {
182 es8316_p0_0: endpoint {
183 remote-endpoint = <&i2s0_8ch_p0_0>;
184 };
185 };
186 };
187};
188
189&i2s0_8ch {
190 pinctrl-names = "default";
191 pinctrl-0 = <&i2s0_lrck
192 &i2s0_mclk
193 &i2s0_sclk
194 &i2s0_sdi0
195 &i2s0_sdo0>;
196 status = "okay";
197
198 i2s0_8ch_p0: port {
199 i2s0_8ch_p0_0: endpoint {
200 dai-format = "i2s";
201 mclk-fs = <256>;
202 remote-endpoint = <&es8316_p0_0>;
203 };
204 };
205};
206
207&pinctrl {
208 hym8563 {
209 hym8563_int: hym8563-int {
210 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
211 };
212 };
213
214 sound {
215 hp_detect: hp-detect {
216 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
217 };
218 };
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900219
220 usb {
221 vcc5v0_host_en: vcc5v0-host-en {
222 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
223 };
224 };
Eugen Hristev72d61d12023-05-29 10:34:23 +0300225};
226
227&pwm1 {
228 status = "okay";
229};
230
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900231&saradc {
232 vref-supply = <&avcc_1v8_s0>;
233 status = "okay";
234};
235
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200236&sdhci {
237 bus-width = <8>;
238 no-sdio;
239 no-sd;
240 non-removable;
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200241 mmc-hs400-1_8v;
242 mmc-hs400-enhanced-strobe;
243 status = "okay";
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900244};
245
246&sdmmc {
247 max-frequency = <200000000>;
248 no-sdio;
249 no-mmc;
250 bus-width = <4>;
251 cap-mmc-highspeed;
252 cap-sd-highspeed;
253 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
254 disable-wp;
255 sd-uhs-sdr104;
256 vmmc-supply = <&vcc_3v3_s3>;
257 vqmmc-supply = <&vccio_sd_s0>;
258 status = "okay";
259};
260
261&spi2 {
262 status = "okay";
263 assigned-clocks = <&cru CLK_SPI2>;
264 assigned-clock-rates = <200000000>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
267 num-cs = <1>;
268
269 pmic@0 {
270 compatible = "rockchip,rk806";
271 spi-max-frequency = <1000000>;
272 reg = <0x0>;
273
274 interrupt-parent = <&gpio0>;
275 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
276
277 pinctrl-names = "default";
278 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
279 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
280
281 vcc1-supply = <&vcc5v0_sys>;
282 vcc2-supply = <&vcc5v0_sys>;
283 vcc3-supply = <&vcc5v0_sys>;
284 vcc4-supply = <&vcc5v0_sys>;
285 vcc5-supply = <&vcc5v0_sys>;
286 vcc6-supply = <&vcc5v0_sys>;
287 vcc7-supply = <&vcc5v0_sys>;
288 vcc8-supply = <&vcc5v0_sys>;
289 vcc9-supply = <&vcc5v0_sys>;
290 vcc10-supply = <&vcc5v0_sys>;
291 vcc11-supply = <&vcc_2v0_pldo_s3>;
292 vcc12-supply = <&vcc5v0_sys>;
293 vcc13-supply = <&vcc_1v1_nldo_s3>;
294 vcc14-supply = <&vcc_1v1_nldo_s3>;
295 vcca-supply = <&vcc5v0_sys>;
296
297 gpio-controller;
298 #gpio-cells = <2>;
299
300 rk806_dvs1_null: dvs1-null-pins {
301 pins = "gpio_pwrctrl2";
302 function = "pin_fun0";
303 };
304
305 rk806_dvs2_null: dvs2-null-pins {
306 pins = "gpio_pwrctrl2";
307 function = "pin_fun0";
308 };
309
310 rk806_dvs3_null: dvs3-null-pins {
311 pins = "gpio_pwrctrl3";
312 function = "pin_fun0";
313 };
314
315 regulators {
316 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
317 regulator-boot-on;
318 regulator-min-microvolt = <550000>;
319 regulator-max-microvolt = <950000>;
320 regulator-ramp-delay = <12500>;
321 regulator-name = "vdd_gpu_s0";
322 regulator-enable-ramp-delay = <400>;
323
324 regulator-state-mem {
325 regulator-off-in-suspend;
326 };
327 };
328
329 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
330 regulator-always-on;
331 regulator-boot-on;
332 regulator-min-microvolt = <550000>;
333 regulator-max-microvolt = <950000>;
334 regulator-ramp-delay = <12500>;
335 regulator-name = "vdd_cpu_lit_s0";
336
337 regulator-state-mem {
338 regulator-off-in-suspend;
339 };
340 };
341
342 vdd_log_s0: dcdc-reg3 {
343 regulator-always-on;
344 regulator-boot-on;
345 regulator-min-microvolt = <675000>;
346 regulator-max-microvolt = <750000>;
347 regulator-ramp-delay = <12500>;
348 regulator-name = "vdd_log_s0";
349
350 regulator-state-mem {
351 regulator-off-in-suspend;
352 regulator-suspend-microvolt = <750000>;
353 };
354 };
355
356 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
357 regulator-always-on;
358 regulator-boot-on;
359 regulator-min-microvolt = <550000>;
360 regulator-max-microvolt = <950000>;
361 regulator-ramp-delay = <12500>;
362 regulator-name = "vdd_vdenc_s0";
363
364 regulator-state-mem {
365 regulator-off-in-suspend;
366 };
367 };
368
369 vdd_ddr_s0: dcdc-reg5 {
370 regulator-always-on;
371 regulator-boot-on;
372 regulator-min-microvolt = <675000>;
373 regulator-max-microvolt = <900000>;
374 regulator-ramp-delay = <12500>;
375 regulator-name = "vdd_ddr_s0";
376
377 regulator-state-mem {
378 regulator-off-in-suspend;
379 regulator-suspend-microvolt = <850000>;
380 };
381 };
382
383 vdd2_ddr_s3: dcdc-reg6 {
384 regulator-always-on;
385 regulator-boot-on;
386 regulator-name = "vdd2_ddr_s3";
387
388 regulator-state-mem {
389 regulator-on-in-suspend;
390 };
391 };
392
393 vcc_2v0_pldo_s3: dcdc-reg7 {
394 regulator-always-on;
395 regulator-boot-on;
396 regulator-min-microvolt = <2000000>;
397 regulator-max-microvolt = <2000000>;
398 regulator-ramp-delay = <12500>;
399 regulator-name = "vdd_2v0_pldo_s3";
400
401 regulator-state-mem {
402 regulator-on-in-suspend;
403 regulator-suspend-microvolt = <2000000>;
404 };
405 };
406
407 vcc_3v3_s3: dcdc-reg8 {
408 regulator-always-on;
409 regulator-boot-on;
410 regulator-min-microvolt = <3300000>;
411 regulator-max-microvolt = <3300000>;
412 regulator-name = "vcc_3v3_s3";
413
414 regulator-state-mem {
415 regulator-on-in-suspend;
416 regulator-suspend-microvolt = <3300000>;
417 };
418 };
419
420 vddq_ddr_s0: dcdc-reg9 {
421 regulator-always-on;
422 regulator-boot-on;
423 regulator-name = "vddq_ddr_s0";
424
425 regulator-state-mem {
426 regulator-off-in-suspend;
427 };
428 };
429
430 vcc_1v8_s3: dcdc-reg10 {
431 regulator-always-on;
432 regulator-boot-on;
433 regulator-min-microvolt = <1800000>;
434 regulator-max-microvolt = <1800000>;
435 regulator-name = "vcc_1v8_s3";
436
437 regulator-state-mem {
438 regulator-on-in-suspend;
439 regulator-suspend-microvolt = <1800000>;
440 };
441 };
442
443 avcc_1v8_s0: pldo-reg1 {
444 regulator-always-on;
445 regulator-boot-on;
446 regulator-min-microvolt = <1800000>;
447 regulator-max-microvolt = <1800000>;
448 regulator-name = "avcc_1v8_s0";
449
450 regulator-state-mem {
451 regulator-off-in-suspend;
452 };
453 };
454
455 vcc_1v8_s0: pldo-reg2 {
456 regulator-always-on;
457 regulator-boot-on;
458 regulator-min-microvolt = <1800000>;
459 regulator-max-microvolt = <1800000>;
460 regulator-name = "vcc_1v8_s0";
461
462 regulator-state-mem {
463 regulator-off-in-suspend;
464 regulator-suspend-microvolt = <1800000>;
465 };
466 };
467
468 avdd_1v2_s0: pldo-reg3 {
469 regulator-always-on;
470 regulator-boot-on;
471 regulator-min-microvolt = <1200000>;
472 regulator-max-microvolt = <1200000>;
473 regulator-name = "avdd_1v2_s0";
474
475 regulator-state-mem {
476 regulator-off-in-suspend;
477 };
478 };
479
480 vcc_3v3_s0: pldo-reg4 {
481 regulator-always-on;
482 regulator-boot-on;
483 regulator-min-microvolt = <3300000>;
484 regulator-max-microvolt = <3300000>;
485 regulator-ramp-delay = <12500>;
486 regulator-name = "vcc_3v3_s0";
487
488 regulator-state-mem {
489 regulator-off-in-suspend;
490 };
491 };
492
493 vccio_sd_s0: pldo-reg5 {
494 regulator-always-on;
495 regulator-boot-on;
496 regulator-min-microvolt = <1800000>;
497 regulator-max-microvolt = <3300000>;
498 regulator-ramp-delay = <12500>;
499 regulator-name = "vccio_sd_s0";
500
501 regulator-state-mem {
502 regulator-off-in-suspend;
503 };
504 };
505
506 pldo6_s3: pldo-reg6 {
507 regulator-always-on;
508 regulator-boot-on;
509 regulator-min-microvolt = <1800000>;
510 regulator-max-microvolt = <1800000>;
511 regulator-name = "pldo6_s3";
512
513 regulator-state-mem {
514 regulator-on-in-suspend;
515 regulator-suspend-microvolt = <1800000>;
516 };
517 };
518
519 vdd_0v75_s3: nldo-reg1 {
520 regulator-always-on;
521 regulator-boot-on;
522 regulator-min-microvolt = <750000>;
523 regulator-max-microvolt = <750000>;
524 regulator-name = "vdd_0v75_s3";
525
526 regulator-state-mem {
527 regulator-on-in-suspend;
528 regulator-suspend-microvolt = <750000>;
529 };
530 };
531
532 vdd_ddr_pll_s0: nldo-reg2 {
533 regulator-always-on;
534 regulator-boot-on;
535 regulator-min-microvolt = <850000>;
536 regulator-max-microvolt = <850000>;
537 regulator-name = "vdd_ddr_pll_s0";
538
539 regulator-state-mem {
540 regulator-off-in-suspend;
541 regulator-suspend-microvolt = <850000>;
542 };
543 };
544
545 avdd_0v75_s0: nldo-reg3 {
546 regulator-always-on;
547 regulator-boot-on;
548 regulator-min-microvolt = <750000>;
549 regulator-max-microvolt = <750000>;
550 regulator-name = "avdd_0v75_s0";
551
552 regulator-state-mem {
553 regulator-off-in-suspend;
554 };
555 };
556
557 vdd_0v85_s0: nldo-reg4 {
558 regulator-always-on;
559 regulator-boot-on;
560 regulator-min-microvolt = <850000>;
561 regulator-max-microvolt = <850000>;
562 regulator-name = "vdd_0v85_s0";
563
564 regulator-state-mem {
565 regulator-off-in-suspend;
566 };
567 };
568
569 vdd_0v75_s0: nldo-reg5 {
570 regulator-always-on;
571 regulator-boot-on;
572 regulator-min-microvolt = <750000>;
573 regulator-max-microvolt = <750000>;
574 regulator-name = "vdd_0v75_s0";
575
576 regulator-state-mem {
577 regulator-off-in-suspend;
578 };
579 };
580 };
581 };
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200582};
583
584&uart2 {
585 pinctrl-0 = <&uart2m0_xfer>;
586 status = "okay";
587};
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900588
589&u2phy2 {
590 status = "okay";
591};
592
593&u2phy2_host {
594 /* connected to USB hub, which is powered by vcc5v0_sys */
595 phy-supply = <&vcc5v0_sys>;
596 status = "okay";
597};
598
599&u2phy3 {
600 status = "okay";
601};
602
603&u2phy3_host {
604 phy-supply = <&vcc5v0_host>;
605 status = "okay";
606};
607
608&usb_host0_ehci {
609 status = "okay";
610};
611
612&usb_host0_ohci {
613 status = "okay";
614};
615
616&usb_host1_ehci {
617 status = "okay";
618};
619
620&usb_host1_ohci {
621 status = "okay";
622};