| Fabio Estevam | 23fe9cf | 2023-08-08 18:40:38 -0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR MIT |
| 2 | |
| Fabio Estevam | ee84bfe | 2023-09-12 12:11:00 -0300 | [diff] [blame] | 3 | #include "imx7s-u-boot.dtsi" |
| 4 | |
| Fabio Estevam | 4cdeea7 | 2023-08-08 18:40:39 -0300 | [diff] [blame] | 5 | / { |
| 6 | wdt-reboot { |
| 7 | compatible = "wdt-reboot"; |
| 8 | wdt = <&wdog1>; |
| 9 | bootph-pre-ram; |
| 10 | }; |
| 11 | }; |
| 12 | |
| Joris Offouga | 7f49a14 | 2019-12-08 18:02:30 +0100 | [diff] [blame] | 13 | &fec2 { |
| 14 | status = "disable"; |
| 15 | }; |
| Joris Offouga | 7284d63 | 2020-01-29 22:06:01 +0100 | [diff] [blame] | 16 | |
| 17 | &usbotg1 { |
| 18 | dr_mode = "peripheral"; |
| 19 | }; |
| Fabio Estevam | bebd462 | 2023-04-12 09:41:04 -0300 | [diff] [blame] | 20 | |
| 21 | &usdhc1 { |
| 22 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| 23 | pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; |
| 24 | pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; |
| 25 | pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; |
| 26 | }; |
| 27 | |
| 28 | &pinctrl_usdhc1 { |
| 29 | fsl,pins = < |
| 30 | MX7D_PAD_SD1_CMD__SD1_CMD 0x59 |
| 31 | MX7D_PAD_SD1_CLK__SD1_CLK 0x19 |
| 32 | MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 |
| 33 | MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 |
| 34 | MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 |
| 35 | MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 |
| 36 | >; |
| 37 | }; |
| 38 | |
| 39 | &iomuxc { |
| 40 | pinctrl_usdhc1_gpio: usdhc1gpiogrp { |
| 41 | fsl,pins = < |
| 42 | MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */ |
| 43 | MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */ |
| 44 | MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */ |
| 45 | MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 /* VSELECT */ |
| 46 | >; |
| 47 | }; |
| 48 | |
| 49 | pinctrl_usdhc1_100mhz: usdhc1100mhzgrp { |
| 50 | fsl,pins = < |
| 51 | MX7D_PAD_SD1_CMD__SD1_CMD 0x5a |
| 52 | MX7D_PAD_SD1_CLK__SD1_CLK 0x1a |
| 53 | MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a |
| 54 | MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a |
| 55 | MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a |
| 56 | MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a |
| 57 | >; |
| 58 | }; |
| 59 | |
| 60 | pinctrl_usdhc1_200mhz: usdhc1200mhzgrp { |
| 61 | fsl,pins = < |
| 62 | MX7D_PAD_SD1_CMD__SD1_CMD 0x5b |
| 63 | MX7D_PAD_SD1_CLK__SD1_CLK 0x1b |
| 64 | MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b |
| 65 | MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b |
| 66 | MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b |
| 67 | MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b |
| 68 | >; |
| 69 | }; |
| 70 | }; |
| Fabio Estevam | 4cdeea7 | 2023-08-08 18:40:39 -0300 | [diff] [blame] | 71 | |
| 72 | &wdog1 { |
| 73 | bootph-pre-ram; |
| 74 | }; |