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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babic4c8d4122016-06-06 11:19:42 +02002/*
3 * Copyright (C) Stefano Babic <sbabic@denx.de>
4 *
5 * Configuration settings for the E+L i.MX6Q DO82 board.
Stefano Babic4c8d4122016-06-06 11:19:42 +02006 */
7
8#ifndef __EL6Q_COMMON_CONFIG_H
9#define __EL6Q_COMMON_CONFIG_H
10
Simon Glassfb64e362020-05-10 11:40:09 -060011#include <linux/stringify.h>
12
Stefano Babic4c8d4122016-06-06 11:19:42 +020013#define CONFIG_BOARD_NAME EL6Q
14
Stefano Babic4c8d4122016-06-06 11:19:42 +020015#include "mx6_common.h"
16
Stefano Babic4c8d4122016-06-06 11:19:42 +020017/* Size of malloc() pool */
18#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
19
Stefano Babic4c8d4122016-06-06 11:19:42 +020020#ifdef CONFIG_SPL
Stefano Babic4c8d4122016-06-06 11:19:42 +020021#include "imx6_spl.h"
22#endif
23
24/* MMC Configs */
25#define CONFIG_SYS_FSL_ESDHC_ADDR 0
26#define CONFIG_SYS_FSL_USDHC_NUM 2
27
28/* I2C config */
29#define CONFIG_SYS_I2C
30#define CONFIG_SYS_I2C_MXC
31#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
32#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
33#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
34#define CONFIG_SYS_I2C_SPEED 100000
35
36/* PMIC */
37#define CONFIG_POWER
38#define CONFIG_POWER_I2C
39#define CONFIG_POWER_PFUZE100
40#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
41
42/* Commands */
Stefano Babic4c8d4122016-06-06 11:19:42 +020043
Stefano Babic4c8d4122016-06-06 11:19:42 +020044#define CONFIG_MXC_UART_BASE UART2_BASE
Stefano Babic4c8d4122016-06-06 11:19:42 +020045
Stefano Babic4c8d4122016-06-06 11:19:42 +020046#define CONFIG_BOARD_NAME EL6Q
47
Stefano Babic4c8d4122016-06-06 11:19:42 +020048#define CONFIG_EXTRA_ENV_SETTINGS \
49 "board="__stringify(CONFIG_BOARD_NAME)"\0" \
50 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
51 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
Simon Glass4694a742016-10-17 20:12:39 -060052 "console=" CONSOLE_DEV "\0" \
Stefano Babic4c8d4122016-06-06 11:19:42 +020053 "fdtfile=undefined\0" \
54 "fdt_high=0xffffffff\0" \
55 "fdt_addr_r=0x18000000\0" \
56 "fdt_addr=0x18000000\0" \
57 "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
58 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
59 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
60 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
61 BOOTENV
62
63#define BOOT_TARGET_DEVICES(func) \
64 func(MMC, mmc, 0) \
65 func(MMC, mmc, 1) \
66 func(PXE, PXE, na) \
67 func(DHCP, dhcp, na)
68
Stefano Babic4c8d4122016-06-06 11:19:42 +020069#include <config_distro_bootcmd.h>
70
71#define CONFIG_ARP_TIMEOUT 200UL
72
Stefano Babic4c8d4122016-06-06 11:19:42 +020073/* Physical Memory Map */
Stefano Babic4c8d4122016-06-06 11:19:42 +020074#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
75
76#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
77#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
78#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
79
80#define CONFIG_SYS_INIT_SP_OFFSET \
81 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
82#define CONFIG_SYS_INIT_SP_ADDR \
83 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
84
Masahiro Yamada8cea9b52017-02-11 22:43:54 +090085/* environment organization */
Stefano Babic4c8d4122016-06-06 11:19:42 +020086
Stefano Babic4c8d4122016-06-06 11:19:42 +020087#endif /* __EL6Q_COMMON_CONFIG_H */