Stefan Roese | d4b75c4 | 2009-06-09 16:57:03 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2004-2008 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2009 Semihalf. |
| 4 | * (C) Copyright 2009 Stefan Roese <sr@denx.de> |
| 5 | * |
| 6 | * Based on original driver from Freescale Semiconductor |
| 7 | * written by John Rigby <jrigby@freescale.com> on basis |
| 8 | * of drivers/mtd/nand/mxc_nand.c. Reworked and extended |
| 9 | * Piotr Ziecik <kosmo@semihalf.com>. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License |
| 13 | * as published by the Free Software Foundation; either version 2 |
| 14 | * of the License, or (at your option) any later version. |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 23 | * MA 02110-1301, USA. |
| 24 | */ |
| 25 | |
| 26 | #include <common.h> |
| 27 | #include <malloc.h> |
| 28 | |
| 29 | #include <linux/mtd/mtd.h> |
| 30 | #include <linux/mtd/nand.h> |
| 31 | #include <linux/mtd/nand_ecc.h> |
| 32 | #include <linux/mtd/compat.h> |
| 33 | |
| 34 | #include <asm/errno.h> |
| 35 | #include <asm/io.h> |
| 36 | #include <asm/processor.h> |
| 37 | #include <nand.h> |
| 38 | |
| 39 | #define DRV_NAME "mpc5121_nfc" |
| 40 | |
| 41 | /* Timeouts */ |
| 42 | #define NFC_RESET_TIMEOUT 1000 /* 1 ms */ |
| 43 | #define NFC_TIMEOUT 2000 /* 2000 us */ |
| 44 | |
| 45 | /* Addresses for NFC MAIN RAM BUFFER areas */ |
| 46 | #define NFC_MAIN_AREA(n) ((n) * 0x200) |
| 47 | |
| 48 | /* Addresses for NFC SPARE BUFFER areas */ |
| 49 | #define NFC_SPARE_BUFFERS 8 |
| 50 | #define NFC_SPARE_LEN 0x40 |
| 51 | #define NFC_SPARE_AREA(n) (0x1000 + ((n) * NFC_SPARE_LEN)) |
| 52 | |
| 53 | /* MPC5121 NFC registers */ |
| 54 | #define NFC_BUF_ADDR 0x1E04 |
| 55 | #define NFC_FLASH_ADDR 0x1E06 |
| 56 | #define NFC_FLASH_CMD 0x1E08 |
| 57 | #define NFC_CONFIG 0x1E0A |
| 58 | #define NFC_ECC_STATUS1 0x1E0C |
| 59 | #define NFC_ECC_STATUS2 0x1E0E |
| 60 | #define NFC_SPAS 0x1E10 |
| 61 | #define NFC_WRPROT 0x1E12 |
| 62 | #define NFC_NF_WRPRST 0x1E18 |
| 63 | #define NFC_CONFIG1 0x1E1A |
| 64 | #define NFC_CONFIG2 0x1E1C |
| 65 | #define NFC_UNLOCKSTART_BLK0 0x1E20 |
| 66 | #define NFC_UNLOCKEND_BLK0 0x1E22 |
| 67 | #define NFC_UNLOCKSTART_BLK1 0x1E24 |
| 68 | #define NFC_UNLOCKEND_BLK1 0x1E26 |
| 69 | #define NFC_UNLOCKSTART_BLK2 0x1E28 |
| 70 | #define NFC_UNLOCKEND_BLK2 0x1E2A |
| 71 | #define NFC_UNLOCKSTART_BLK3 0x1E2C |
| 72 | #define NFC_UNLOCKEND_BLK3 0x1E2E |
| 73 | |
| 74 | /* Bit Definitions: NFC_BUF_ADDR */ |
| 75 | #define NFC_RBA_MASK (7 << 0) |
| 76 | #define NFC_ACTIVE_CS_SHIFT 5 |
| 77 | #define NFC_ACTIVE_CS_MASK (3 << NFC_ACTIVE_CS_SHIFT) |
| 78 | |
| 79 | /* Bit Definitions: NFC_CONFIG */ |
| 80 | #define NFC_BLS_UNLOCKED (1 << 1) |
| 81 | |
| 82 | /* Bit Definitions: NFC_CONFIG1 */ |
| 83 | #define NFC_ECC_4BIT (1 << 0) |
| 84 | #define NFC_FULL_PAGE_DMA (1 << 1) |
| 85 | #define NFC_SPARE_ONLY (1 << 2) |
| 86 | #define NFC_ECC_ENABLE (1 << 3) |
| 87 | #define NFC_INT_MASK (1 << 4) |
| 88 | #define NFC_BIG_ENDIAN (1 << 5) |
| 89 | #define NFC_RESET (1 << 6) |
| 90 | #define NFC_CE (1 << 7) |
| 91 | #define NFC_ONE_CYCLE (1 << 8) |
| 92 | #define NFC_PPB_32 (0 << 9) |
| 93 | #define NFC_PPB_64 (1 << 9) |
| 94 | #define NFC_PPB_128 (2 << 9) |
| 95 | #define NFC_PPB_256 (3 << 9) |
| 96 | #define NFC_PPB_MASK (3 << 9) |
| 97 | #define NFC_FULL_PAGE_INT (1 << 11) |
| 98 | |
| 99 | /* Bit Definitions: NFC_CONFIG2 */ |
| 100 | #define NFC_COMMAND (1 << 0) |
| 101 | #define NFC_ADDRESS (1 << 1) |
| 102 | #define NFC_INPUT (1 << 2) |
| 103 | #define NFC_OUTPUT (1 << 3) |
| 104 | #define NFC_ID (1 << 4) |
| 105 | #define NFC_STATUS (1 << 5) |
| 106 | #define NFC_CMD_FAIL (1 << 15) |
| 107 | #define NFC_INT (1 << 15) |
| 108 | |
| 109 | /* Bit Definitions: NFC_WRPROT */ |
| 110 | #define NFC_WPC_LOCK_TIGHT (1 << 0) |
| 111 | #define NFC_WPC_LOCK (1 << 1) |
| 112 | #define NFC_WPC_UNLOCK (1 << 2) |
| 113 | |
| 114 | struct mpc5121_nfc_prv { |
| 115 | struct mtd_info mtd; |
| 116 | struct nand_chip chip; |
| 117 | int irq; |
| 118 | void __iomem *regs; |
| 119 | struct clk *clk; |
| 120 | uint column; |
| 121 | int spareonly; |
| 122 | int chipsel; |
| 123 | }; |
| 124 | |
| 125 | int mpc5121_nfc_chip = 0; |
| 126 | |
| 127 | static void mpc5121_nfc_done(struct mtd_info *mtd); |
| 128 | |
| 129 | /* Read NFC register */ |
| 130 | static inline u16 nfc_read(struct mtd_info *mtd, uint reg) |
| 131 | { |
| 132 | struct nand_chip *chip = mtd->priv; |
| 133 | struct mpc5121_nfc_prv *prv = chip->priv; |
| 134 | |
| 135 | return in_be16(prv->regs + reg); |
| 136 | } |
| 137 | |
| 138 | /* Write NFC register */ |
| 139 | static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val) |
| 140 | { |
| 141 | struct nand_chip *chip = mtd->priv; |
| 142 | struct mpc5121_nfc_prv *prv = chip->priv; |
| 143 | |
| 144 | out_be16(prv->regs + reg, val); |
| 145 | } |
| 146 | |
| 147 | /* Set bits in NFC register */ |
| 148 | static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits) |
| 149 | { |
| 150 | nfc_write(mtd, reg, nfc_read(mtd, reg) | bits); |
| 151 | } |
| 152 | |
| 153 | /* Clear bits in NFC register */ |
| 154 | static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits) |
| 155 | { |
| 156 | nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits); |
| 157 | } |
| 158 | |
| 159 | /* Invoke address cycle */ |
| 160 | static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr) |
| 161 | { |
| 162 | nfc_write(mtd, NFC_FLASH_ADDR, addr); |
| 163 | nfc_write(mtd, NFC_CONFIG2, NFC_ADDRESS); |
| 164 | mpc5121_nfc_done(mtd); |
| 165 | } |
| 166 | |
| 167 | /* Invoke command cycle */ |
| 168 | static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd) |
| 169 | { |
| 170 | nfc_write(mtd, NFC_FLASH_CMD, cmd); |
| 171 | nfc_write(mtd, NFC_CONFIG2, NFC_COMMAND); |
| 172 | mpc5121_nfc_done(mtd); |
| 173 | } |
| 174 | |
| 175 | /* Send data from NFC buffers to NAND flash */ |
| 176 | static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd) |
| 177 | { |
| 178 | nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK); |
| 179 | nfc_write(mtd, NFC_CONFIG2, NFC_INPUT); |
| 180 | mpc5121_nfc_done(mtd); |
| 181 | } |
| 182 | |
| 183 | /* Receive data from NAND flash */ |
| 184 | static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd) |
| 185 | { |
| 186 | nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK); |
| 187 | nfc_write(mtd, NFC_CONFIG2, NFC_OUTPUT); |
| 188 | mpc5121_nfc_done(mtd); |
| 189 | } |
| 190 | |
| 191 | /* Receive ID from NAND flash */ |
| 192 | static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd) |
| 193 | { |
| 194 | nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK); |
| 195 | nfc_write(mtd, NFC_CONFIG2, NFC_ID); |
| 196 | mpc5121_nfc_done(mtd); |
| 197 | } |
| 198 | |
| 199 | /* Receive status from NAND flash */ |
| 200 | static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd) |
| 201 | { |
| 202 | nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK); |
| 203 | nfc_write(mtd, NFC_CONFIG2, NFC_STATUS); |
| 204 | mpc5121_nfc_done(mtd); |
| 205 | } |
| 206 | |
| 207 | static void mpc5121_nfc_done(struct mtd_info *mtd) |
| 208 | { |
| 209 | int max_retries = NFC_TIMEOUT; |
| 210 | |
| 211 | while (1) { |
| 212 | max_retries--; |
| 213 | if (nfc_read(mtd, NFC_CONFIG2) & NFC_INT) |
| 214 | break; |
| 215 | udelay(1); |
| 216 | } |
| 217 | |
| 218 | if (max_retries <= 0) |
| 219 | printk(KERN_WARNING DRV_NAME |
| 220 | ": Timeout while waiting for completion.\n"); |
| 221 | } |
| 222 | |
| 223 | /* Do address cycle(s) */ |
| 224 | static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page) |
| 225 | { |
| 226 | struct nand_chip *chip = mtd->priv; |
| 227 | u32 pagemask = chip->pagemask; |
| 228 | |
| 229 | if (column != -1) { |
| 230 | mpc5121_nfc_send_addr(mtd, column); |
| 231 | if (mtd->writesize > 512) |
| 232 | mpc5121_nfc_send_addr(mtd, column >> 8); |
| 233 | } |
| 234 | |
| 235 | if (page != -1) { |
| 236 | do { |
| 237 | mpc5121_nfc_send_addr(mtd, page & 0xFF); |
| 238 | page >>= 8; |
| 239 | pagemask >>= 8; |
| 240 | } while (pagemask); |
| 241 | } |
| 242 | } |
| 243 | |
| 244 | /* Control chip select signals */ |
| 245 | |
| 246 | /* |
| 247 | * Selecting the active device: |
| 248 | * |
| 249 | * This is different than the linux version. Switching between chips |
| 250 | * is done via board_nand_select_device(). The Linux select_chip |
| 251 | * function used here in U-Boot has only 2 valid chip numbers: |
| 252 | * 0 select |
| 253 | * -1 deselect |
| 254 | */ |
| 255 | |
| 256 | /* |
| 257 | * Implement it as a weak default, so that boards with a specific |
| 258 | * chip-select routine can use their own function. |
| 259 | */ |
| 260 | void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip) |
| 261 | { |
| 262 | if (chip < 0) { |
| 263 | nfc_clear(mtd, NFC_CONFIG1, NFC_CE); |
| 264 | return; |
| 265 | } |
| 266 | |
| 267 | nfc_clear(mtd, NFC_BUF_ADDR, NFC_ACTIVE_CS_MASK); |
| 268 | nfc_set(mtd, NFC_BUF_ADDR, (chip << NFC_ACTIVE_CS_SHIFT) & |
| 269 | NFC_ACTIVE_CS_MASK); |
| 270 | nfc_set(mtd, NFC_CONFIG1, NFC_CE); |
| 271 | } |
| 272 | void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip) |
| 273 | __attribute__((weak, alias("__mpc5121_nfc_select_chip"))); |
| 274 | |
| 275 | void board_nand_select_device(struct nand_chip *nand, int chip) |
| 276 | { |
| 277 | /* |
| 278 | * Only save this chip number in global variable here. This |
| 279 | * will be used later in mpc5121_nfc_select_chip(). |
| 280 | */ |
| 281 | mpc5121_nfc_chip = chip; |
| 282 | } |
| 283 | |
| 284 | /* Read NAND Ready/Busy signal */ |
| 285 | static int mpc5121_nfc_dev_ready(struct mtd_info *mtd) |
| 286 | { |
| 287 | /* |
| 288 | * NFC handles ready/busy signal internally. Therefore, this function |
| 289 | * always returns status as ready. |
| 290 | */ |
| 291 | return 1; |
| 292 | } |
| 293 | |
| 294 | /* Write command to NAND flash */ |
| 295 | static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command, |
| 296 | int column, int page) |
| 297 | { |
| 298 | struct nand_chip *chip = mtd->priv; |
| 299 | struct mpc5121_nfc_prv *prv = chip->priv; |
| 300 | |
| 301 | prv->column = (column >= 0) ? column : 0; |
| 302 | prv->spareonly = 0; |
| 303 | |
| 304 | switch (command) { |
| 305 | case NAND_CMD_PAGEPROG: |
| 306 | mpc5121_nfc_send_prog_page(mtd); |
| 307 | break; |
| 308 | /* |
| 309 | * NFC does not support sub-page reads and writes, |
| 310 | * so emulate them using full page transfers. |
| 311 | */ |
| 312 | case NAND_CMD_READ0: |
| 313 | column = 0; |
| 314 | break; |
| 315 | |
| 316 | case NAND_CMD_READ1: |
| 317 | prv->column += 256; |
| 318 | command = NAND_CMD_READ0; |
| 319 | column = 0; |
| 320 | break; |
| 321 | |
| 322 | case NAND_CMD_READOOB: |
| 323 | prv->spareonly = 1; |
| 324 | command = NAND_CMD_READ0; |
| 325 | column = 0; |
| 326 | break; |
| 327 | |
| 328 | case NAND_CMD_SEQIN: |
| 329 | mpc5121_nfc_command(mtd, NAND_CMD_READ0, column, page); |
| 330 | column = 0; |
| 331 | break; |
| 332 | |
| 333 | case NAND_CMD_ERASE1: |
| 334 | case NAND_CMD_ERASE2: |
| 335 | case NAND_CMD_READID: |
| 336 | case NAND_CMD_STATUS: |
Paul Gibson | e4596ff | 2009-09-16 10:05:00 +1000 | [diff] [blame] | 337 | case NAND_CMD_RESET: |
Stefan Roese | d4b75c4 | 2009-06-09 16:57:03 +0200 | [diff] [blame] | 338 | break; |
| 339 | |
| 340 | default: |
| 341 | return; |
| 342 | } |
| 343 | |
| 344 | mpc5121_nfc_send_cmd(mtd, command); |
| 345 | mpc5121_nfc_addr_cycle(mtd, column, page); |
| 346 | |
| 347 | switch (command) { |
| 348 | case NAND_CMD_READ0: |
| 349 | if (mtd->writesize > 512) |
| 350 | mpc5121_nfc_send_cmd(mtd, NAND_CMD_READSTART); |
| 351 | mpc5121_nfc_send_read_page(mtd); |
| 352 | break; |
| 353 | |
| 354 | case NAND_CMD_READID: |
| 355 | mpc5121_nfc_send_read_id(mtd); |
| 356 | break; |
| 357 | |
| 358 | case NAND_CMD_STATUS: |
| 359 | mpc5121_nfc_send_read_status(mtd); |
| 360 | if (chip->options & NAND_BUSWIDTH_16) |
| 361 | prv->column = 1; |
| 362 | else |
| 363 | prv->column = 0; |
| 364 | break; |
| 365 | } |
| 366 | } |
| 367 | |
| 368 | /* Copy data from/to NFC spare buffers. */ |
| 369 | static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset, |
| 370 | u8 * buffer, uint size, int wr) |
| 371 | { |
| 372 | struct nand_chip *nand = mtd->priv; |
| 373 | struct mpc5121_nfc_prv *prv = nand->priv; |
| 374 | uint o, s, sbsize, blksize; |
| 375 | |
| 376 | /* |
| 377 | * NAND spare area is available through NFC spare buffers. |
| 378 | * The NFC divides spare area into (page_size / 512) chunks. |
| 379 | * Each chunk is placed into separate spare memory area, using |
| 380 | * first (spare_size / num_of_chunks) bytes of the buffer. |
| 381 | * |
| 382 | * For NAND device in which the spare area is not divided fully |
| 383 | * by the number of chunks, number of used bytes in each spare |
| 384 | * buffer is rounded down to the nearest even number of bytes, |
| 385 | * and all remaining bytes are added to the last used spare area. |
| 386 | * |
| 387 | * For more information read section 26.6.10 of MPC5121e |
| 388 | * Microcontroller Reference Manual, Rev. 3. |
| 389 | */ |
| 390 | |
| 391 | /* Calculate number of valid bytes in each spare buffer */ |
| 392 | sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1; |
| 393 | |
| 394 | while (size) { |
| 395 | /* Calculate spare buffer number */ |
| 396 | s = offset / sbsize; |
| 397 | if (s > NFC_SPARE_BUFFERS - 1) |
| 398 | s = NFC_SPARE_BUFFERS - 1; |
| 399 | |
| 400 | /* |
| 401 | * Calculate offset to requested data block in selected spare |
| 402 | * buffer and its size. |
| 403 | */ |
| 404 | o = offset - (s * sbsize); |
| 405 | blksize = min(sbsize - o, size); |
| 406 | |
| 407 | if (wr) |
| 408 | memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o, |
| 409 | buffer, blksize); |
| 410 | else |
| 411 | memcpy_fromio(buffer, |
| 412 | prv->regs + NFC_SPARE_AREA(s) + o, |
| 413 | blksize); |
| 414 | |
| 415 | buffer += blksize; |
| 416 | offset += blksize; |
| 417 | size -= blksize; |
| 418 | }; |
| 419 | } |
| 420 | |
| 421 | /* Copy data from/to NFC main and spare buffers */ |
| 422 | static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char * buf, int len, |
| 423 | int wr) |
| 424 | { |
| 425 | struct nand_chip *chip = mtd->priv; |
| 426 | struct mpc5121_nfc_prv *prv = chip->priv; |
| 427 | uint c = prv->column; |
| 428 | uint l; |
| 429 | |
| 430 | /* Handle spare area access */ |
| 431 | if (prv->spareonly || c >= mtd->writesize) { |
| 432 | /* Calculate offset from beginning of spare area */ |
| 433 | if (c >= mtd->writesize) |
| 434 | c -= mtd->writesize; |
| 435 | |
| 436 | prv->column += len; |
| 437 | mpc5121_nfc_copy_spare(mtd, c, buf, len, wr); |
| 438 | return; |
| 439 | } |
| 440 | |
| 441 | /* |
| 442 | * Handle main area access - limit copy length to prevent |
| 443 | * crossing main/spare boundary. |
| 444 | */ |
| 445 | l = min((uint) len, mtd->writesize - c); |
| 446 | prv->column += l; |
| 447 | |
| 448 | if (wr) |
| 449 | memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l); |
| 450 | else |
| 451 | memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l); |
| 452 | |
| 453 | /* Handle crossing main/spare boundary */ |
| 454 | if (l != len) { |
| 455 | buf += l; |
| 456 | len -= l; |
| 457 | mpc5121_nfc_buf_copy(mtd, buf, len, wr); |
| 458 | } |
| 459 | } |
| 460 | |
| 461 | /* Read data from NFC buffers */ |
| 462 | static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char * buf, int len) |
| 463 | { |
| 464 | mpc5121_nfc_buf_copy(mtd, buf, len, 0); |
| 465 | } |
| 466 | |
| 467 | /* Write data to NFC buffers */ |
| 468 | static void mpc5121_nfc_write_buf(struct mtd_info *mtd, |
| 469 | const u_char * buf, int len) |
| 470 | { |
| 471 | mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1); |
| 472 | } |
| 473 | |
| 474 | /* Compare buffer with NAND flash */ |
| 475 | static int mpc5121_nfc_verify_buf(struct mtd_info *mtd, |
| 476 | const u_char * buf, int len) |
| 477 | { |
| 478 | u_char tmp[256]; |
| 479 | uint bsize; |
| 480 | |
| 481 | while (len) { |
| 482 | bsize = min(len, 256); |
| 483 | mpc5121_nfc_read_buf(mtd, tmp, bsize); |
| 484 | |
| 485 | if (memcmp(buf, tmp, bsize)) |
| 486 | return 1; |
| 487 | |
| 488 | buf += bsize; |
| 489 | len -= bsize; |
| 490 | } |
| 491 | |
| 492 | return 0; |
| 493 | } |
| 494 | |
| 495 | /* Read byte from NFC buffers */ |
| 496 | static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd) |
| 497 | { |
| 498 | u8 tmp; |
| 499 | |
| 500 | mpc5121_nfc_read_buf(mtd, &tmp, sizeof(tmp)); |
| 501 | |
| 502 | return tmp; |
| 503 | } |
| 504 | |
| 505 | /* Read word from NFC buffers */ |
| 506 | static u16 mpc5121_nfc_read_word(struct mtd_info *mtd) |
| 507 | { |
| 508 | u16 tmp; |
| 509 | |
| 510 | mpc5121_nfc_read_buf(mtd, (u_char *) & tmp, sizeof(tmp)); |
| 511 | |
| 512 | return tmp; |
| 513 | } |
| 514 | |
| 515 | /* |
| 516 | * Read NFC configuration from Reset Config Word |
| 517 | * |
| 518 | * NFC is configured during reset in basis of information stored |
| 519 | * in Reset Config Word. There is no other way to set NAND block |
| 520 | * size, spare size and bus width. |
| 521 | */ |
| 522 | static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd) |
| 523 | { |
| 524 | immap_t *im = (immap_t *)CONFIG_SYS_IMMR; |
| 525 | struct nand_chip *chip = mtd->priv; |
| 526 | uint rcw_pagesize = 0; |
| 527 | uint rcw_sparesize = 0; |
| 528 | uint rcw_width; |
| 529 | uint rcwh; |
| 530 | uint romloc, ps; |
| 531 | |
| 532 | rcwh = in_be32(&(im->reset.rcwh)); |
| 533 | |
| 534 | /* Bit 6: NFC bus width */ |
| 535 | rcw_width = ((rcwh >> 6) & 0x1) ? 2 : 1; |
| 536 | |
| 537 | /* Bit 7: NFC Page/Spare size */ |
| 538 | ps = (rcwh >> 7) & 0x1; |
| 539 | |
| 540 | /* Bits [22:21]: ROM Location */ |
| 541 | romloc = (rcwh >> 21) & 0x3; |
| 542 | |
| 543 | /* Decode RCW bits */ |
| 544 | switch ((ps << 2) | romloc) { |
| 545 | case 0x00: |
| 546 | case 0x01: |
| 547 | rcw_pagesize = 512; |
| 548 | rcw_sparesize = 16; |
| 549 | break; |
| 550 | case 0x02: |
| 551 | case 0x03: |
| 552 | rcw_pagesize = 4096; |
| 553 | rcw_sparesize = 128; |
| 554 | break; |
| 555 | case 0x04: |
| 556 | case 0x05: |
| 557 | rcw_pagesize = 2048; |
| 558 | rcw_sparesize = 64; |
| 559 | break; |
| 560 | case 0x06: |
| 561 | case 0x07: |
| 562 | rcw_pagesize = 4096; |
| 563 | rcw_sparesize = 218; |
| 564 | break; |
| 565 | } |
| 566 | |
| 567 | mtd->writesize = rcw_pagesize; |
| 568 | mtd->oobsize = rcw_sparesize; |
| 569 | if (rcw_width == 2) |
| 570 | chip->options |= NAND_BUSWIDTH_16; |
| 571 | |
| 572 | debug(KERN_NOTICE DRV_NAME ": Configured for " |
| 573 | "%u-bit NAND, page size %u with %u spare.\n", |
| 574 | rcw_width * 8, rcw_pagesize, rcw_sparesize); |
| 575 | return 0; |
| 576 | } |
| 577 | |
| 578 | int board_nand_init(struct nand_chip *chip) |
| 579 | { |
| 580 | struct mpc5121_nfc_prv *prv; |
| 581 | struct mtd_info *mtd; |
| 582 | int resettime = 0; |
| 583 | int retval = 0; |
| 584 | int rev; |
| 585 | static int chip_nr = 0; |
| 586 | |
| 587 | /* |
| 588 | * Check SoC revision. This driver supports only NFC |
| 589 | * in MPC5121 revision 2. |
| 590 | */ |
| 591 | rev = (mfspr(SPRN_SVR) >> 4) & 0xF; |
| 592 | if (rev != 2) { |
| 593 | printk(KERN_ERR DRV_NAME |
| 594 | ": SoC revision %u is not supported!\n", rev); |
| 595 | return -ENXIO; |
| 596 | } |
| 597 | |
| 598 | prv = malloc(sizeof(*prv)); |
| 599 | if (!prv) { |
| 600 | printk(KERN_ERR DRV_NAME ": Memory exhausted!\n"); |
| 601 | return -ENOMEM; |
| 602 | } |
| 603 | |
| 604 | mtd = &nand_info[chip_nr++]; |
| 605 | mtd->priv = chip; |
| 606 | chip->priv = prv; |
| 607 | |
| 608 | /* Read NFC configuration from Reset Config Word */ |
| 609 | retval = mpc5121_nfc_read_hw_config(mtd); |
| 610 | if (retval) { |
| 611 | printk(KERN_ERR DRV_NAME ": Unable to read NFC config!\n"); |
| 612 | return retval; |
| 613 | } |
| 614 | |
| 615 | prv->regs = (void __iomem *)CONFIG_SYS_NAND_BASE; |
| 616 | chip->dev_ready = mpc5121_nfc_dev_ready; |
| 617 | chip->cmdfunc = mpc5121_nfc_command; |
| 618 | chip->read_byte = mpc5121_nfc_read_byte; |
| 619 | chip->read_word = mpc5121_nfc_read_word; |
| 620 | chip->read_buf = mpc5121_nfc_read_buf; |
| 621 | chip->write_buf = mpc5121_nfc_write_buf; |
| 622 | chip->verify_buf = mpc5121_nfc_verify_buf; |
| 623 | chip->select_chip = mpc5121_nfc_select_chip; |
| 624 | chip->options = NAND_NO_AUTOINCR | NAND_USE_FLASH_BBT; |
| 625 | chip->ecc.mode = NAND_ECC_SOFT; |
| 626 | |
| 627 | /* Reset NAND Flash controller */ |
| 628 | nfc_set(mtd, NFC_CONFIG1, NFC_RESET); |
| 629 | while (nfc_read(mtd, NFC_CONFIG1) & NFC_RESET) { |
| 630 | if (resettime++ >= NFC_RESET_TIMEOUT) { |
| 631 | printk(KERN_ERR DRV_NAME |
| 632 | ": Timeout while resetting NFC!\n"); |
| 633 | retval = -EINVAL; |
| 634 | goto error; |
| 635 | } |
| 636 | |
| 637 | udelay(1); |
| 638 | } |
| 639 | |
| 640 | /* Enable write to NFC memory */ |
| 641 | nfc_write(mtd, NFC_CONFIG, NFC_BLS_UNLOCKED); |
| 642 | |
| 643 | /* Enable write to all NAND pages */ |
| 644 | nfc_write(mtd, NFC_UNLOCKSTART_BLK0, 0x0000); |
| 645 | nfc_write(mtd, NFC_UNLOCKEND_BLK0, 0xFFFF); |
| 646 | nfc_write(mtd, NFC_WRPROT, NFC_WPC_UNLOCK); |
| 647 | |
| 648 | /* |
| 649 | * Setup NFC: |
| 650 | * - Big Endian transfers, |
| 651 | * - Interrupt after full page read/write. |
| 652 | */ |
| 653 | nfc_write(mtd, NFC_CONFIG1, NFC_BIG_ENDIAN | NFC_INT_MASK | |
| 654 | NFC_FULL_PAGE_INT); |
| 655 | |
| 656 | /* Set spare area size */ |
| 657 | nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1); |
| 658 | |
| 659 | /* Detect NAND chips */ |
| 660 | if (nand_scan(mtd, 1)) { |
| 661 | printk(KERN_ERR DRV_NAME ": NAND Flash not found !\n"); |
| 662 | retval = -ENXIO; |
| 663 | goto error; |
| 664 | } |
| 665 | |
| 666 | /* Set erase block size */ |
| 667 | switch (mtd->erasesize / mtd->writesize) { |
| 668 | case 32: |
| 669 | nfc_set(mtd, NFC_CONFIG1, NFC_PPB_32); |
| 670 | break; |
| 671 | |
| 672 | case 64: |
| 673 | nfc_set(mtd, NFC_CONFIG1, NFC_PPB_64); |
| 674 | break; |
| 675 | |
| 676 | case 128: |
| 677 | nfc_set(mtd, NFC_CONFIG1, NFC_PPB_128); |
| 678 | break; |
| 679 | |
| 680 | case 256: |
| 681 | nfc_set(mtd, NFC_CONFIG1, NFC_PPB_256); |
| 682 | break; |
| 683 | |
| 684 | default: |
| 685 | printk(KERN_ERR DRV_NAME ": Unsupported NAND flash!\n"); |
| 686 | retval = -ENXIO; |
| 687 | goto error; |
| 688 | } |
| 689 | |
| 690 | return 0; |
| 691 | error: |
| 692 | return retval; |
| 693 | } |