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git01.mediatek.com / filogic / uboot / 2b24ddef8b40f1b2e49cad2cb6ab138195a9eb24 / . / arch / arm / dts / rk3399-u-boot.dtsi
blob: 8a0b1803f3401f5cddfa2dcc779c0ce8deca95e1 [file] [log] [blame]
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
4 */
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]5#define USB_CLASS_HUB 9
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]6
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]7#include "rockchip-u-boot.dtsi"
8
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]9/ {
10 aliases {
11 mmc0 = &sdhci;
12 mmc1 = &sdmmc;
Jagan Teki77c31a82020-05-09 22:26:23 +0530[diff] [blame]13 pci0 = &pcie0;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]14 spi1 = &spi1;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]15 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]16
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]17 cic: syscon@ff620000 {
18 u-boot,dm-pre-reloc;
19 compatible = "rockchip,rk3399-cic", "syscon";
20 reg = <0x0 0xff620000 0x0 0x100>;
21 };
22
23 dfi: dfi@ff630000 {
24 u-boot,dm-pre-reloc;
25 reg = <0x00 0xff630000 0x00 0x4000>;
26 compatible = "rockchip,rk3399-dfi";
27 rockchip,pmu = <&pmugrf>;
28 clocks = <&cru PCLK_DDR_MON>;
29 clock-names = "pclk_ddr_mon";
30 };
31
Lin Jinhan3e714cf2020-03-31 17:39:57 +0800[diff] [blame]32 rng: rng@ff8b8000 {
33 compatible = "rockchip,cryptov1-rng";
34 reg = <0x0 0xff8b8000 0x0 0x1000>;
Peter Robinson0ef3a0e2020-12-16 15:48:42 +0000[diff] [blame]35 status = "okay";
Lin Jinhan3e714cf2020-03-31 17:39:57 +0800[diff] [blame]36 };
37
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]38 dmc: dmc {
39 u-boot,dm-pre-reloc;
40 compatible = "rockchip,rk3399-dmc";
41 devfreq-events = <&dfi>;
42 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
43 clocks = <&cru SCLK_DDRCLK>;
44 clock-names = "dmc_clk";
45 reg = <0x0 0xffa80000 0x0 0x0800
46 0x0 0xffa80800 0x0 0x1800
47 0x0 0xffa82000 0x0 0x2000
48 0x0 0xffa84000 0x0 0x1000
49 0x0 0xffa88000 0x0 0x0800
50 0x0 0xffa88800 0x0 0x1800
51 0x0 0xffa8a000 0x0 0x2000
52 0x0 0xffa8c000 0x0 0x1000>;
53 };
54
55 pmusgrf: syscon@ff330000 {
56 u-boot,dm-pre-reloc;
57 compatible = "rockchip,rk3399-pmusgrf", "syscon";
58 reg = <0x0 0xff330000 0x0 0xe3d4>;
59 };
60
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]61};
62
Quentin Schulz12df9cf2022-09-02 15:10:54 +0200[diff] [blame]63#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]64&binman {
Simon Glassf1268222023-01-07 14:07:17 -0700[diff] [blame]65 multiple-images;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]66 rom {
67 filename = "u-boot.rom";
68 size = <0x400000>;
69 pad-byte = <0xff>;
70
71 mkimage {
72 args = "-n rk3399 -T rkspi";
73 u-boot-spl {
74 };
75 };
76 u-boot-img {
77 offset = <0x40000>;
78 };
79 u-boot {
80 offset = <0x300000>;
81 };
82 fdtmap {
83 };
84 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]85};
Simon Glassf1268222023-01-07 14:07:17 -0700[diff] [blame]86#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]87
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]88&cru {
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]89 u-boot,dm-pre-reloc;
90};
91
Yifeng Zhaod7e4c322021-11-01 12:43:47 +0800[diff] [blame]92&emmc_phy {
93 u-boot,dm-pre-reloc;
94};
95
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]96&grf {
97 u-boot,dm-pre-reloc;
98};
99
100&pinctrl {
101 u-boot,dm-pre-reloc;
102};
103
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]104&pmu {
105 u-boot,dm-pre-reloc;
106};
107
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]108&pmugrf {
109 u-boot,dm-pre-reloc;
110};
111
112&pmu {
113 u-boot,dm-pre-reloc;
114};
115
116&pmucru {
117 u-boot,dm-pre-reloc;
118};
119
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]120&sdhci {
Jagan Teki5cc21182020-04-28 15:30:17 +0530[diff] [blame]121 max-frequency = <200000000>;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]122 u-boot,dm-pre-reloc;
123};
124
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]125&sdmmc {
126 u-boot,dm-pre-reloc;
Deepak Das4ef2ded2020-04-15 08:55:24 +0530[diff] [blame]127
128 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
129 u-boot,spl-fifo-mode;
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]130};
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]131
132&spi1 {
133 u-boot,dm-pre-reloc;
134};
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]135
136&uart0 {
137 u-boot,dm-pre-reloc;
138};
139
140&uart2 {
141 u-boot,dm-pre-reloc;
142};
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]143
144&vopb {
145 u-boot,dm-pre-reloc;
146};
147
148&vopl {
149 u-boot,dm-pre-reloc;
150};