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Boris BREZILLON7832bf32015-03-04 13:13:05 +01001/*
2 * Copyright (C) 2013 Seco S.r.l
3 *
4 * Configuration settings for the Seco Boards.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#include "mx6_common.h"
Boris BREZILLON7832bf32015-03-04 13:13:05 +010013
Boris BREZILLON7832bf32015-03-04 13:13:05 +010014#define CONFIG_BOARD_REVISION_TAG
15
16/* Size of malloc() pool */
17#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
18
Boris BREZILLON7832bf32015-03-04 13:13:05 +010019#define CONFIG_MXC_UART
20#define CONFIG_MXC_UART_BASE UART2_BASE
21
Boris BREZILLON7832bf32015-03-04 13:13:05 +010022#define CONFIG_SYS_MEMTEST_START 0x10000000
23#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
Boris BREZILLON7832bf32015-03-04 13:13:05 +010024
25/* MMC Configuration */
Boris BREZILLON7832bf32015-03-04 13:13:05 +010026#define CONFIG_SYS_FSL_USDHC_NUM 2
27#define CONFIG_SYS_FSL_ESDHC_ADDR 0
28
Boris BREZILLON7832bf32015-03-04 13:13:05 +010029/* Ethernet Configuration */
Boris BREZILLON7832bf32015-03-04 13:13:05 +010030#define CONFIG_FEC_MXC
31#define CONFIG_MII
32#define IMX_FEC_BASE ENET_BASE_ADDR
33#define CONFIG_FEC_XCV_TYPE RGMII
34#define CONFIG_ETHPRIME "FEC"
35#define CONFIG_FEC_MXC_PHYADDR 6
Boris BREZILLON7832bf32015-03-04 13:13:05 +010036
37#define CONFIG_EXTRA_ENV_SETTINGS \
38 "netdev=eth0\0" \
39 "ethprime=FEC0\0" \
40 "netdev=eth0\0" \
41 "ethprime=FEC0\0" \
42 "uboot=u-boot.bin\0" \
43 "kernel=uImage\0" \
44 "nfsroot=/opt/eldk/arm\0" \
45 "ip_local=10.0.0.5::10.0.0.1:255.255.255.0::eth0:off\0" \
46 "ip_server=10.0.0.1\0" \
47 "nfs_path=/targetfs \0" \
48 "memory=mem=1024M\0" \
49 "bootdev=mmc dev 0; ext2load mmc 0:1\0" \
50 "root=root=/dev/mmcblk0p1\0" \
51 "option=rootwait rw fixrtc rootflags=barrier=1\0" \
52 "cpu_freq=arm_freq=996\0" \
53 "setbootargs=setenv bootargs console=ttymxc1,115200 ${root}" \
54 " ${option} ${memory} ${cpu_freq}\0" \
55 "setbootargs_nfs=setenv bootargs console=ttymxc1,115200" \
56 " root=/dev/nfs nfsroot=${ip_server}:${nfs_path}" \
57 " nolock,wsize=4096,rsize=4096 ip=:::::eth0:dhcp" \
58 " ${memory} ${cpu_freq}\0" \
59 "setbootdev=setenv boot_dev ${bootdev} 10800000 /boot/uImage\0" \
60 "bootcmd=run setbootargs; run setbootdev; run boot_dev;" \
61 " bootm 0x10800000\0" \
62 "stdin=serial\0" \
63 "stdout=serial\0" \
64 "stderr=serial\0"
65
Boris BREZILLON7832bf32015-03-04 13:13:05 +010066#define CONFIG_SYS_HZ 1000
67
Boris BREZILLON7832bf32015-03-04 13:13:05 +010068/* Physical Memory Map */
69#define CONFIG_NR_DRAM_BANKS 1
70#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
71#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
72
73#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
74#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
75#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
76
77#define CONFIG_SYS_INIT_SP_OFFSET \
78 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
79#define CONFIG_SYS_INIT_SP_ADDR \
80 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
81
Peter Robinson4b671502015-05-22 17:30:45 +010082/* Environment organization */
Boris BREZILLON7832bf32015-03-04 13:13:05 +010083#define CONFIG_ENV_SIZE (8 * 1024)
84
85#if defined(CONFIG_ENV_IS_IN_MMC)
86 #define CONFIG_ENV_OFFSET (6 * 128 * 1024)
87 #define CONFIG_SYS_MMC_ENV_DEV 0
88 #define CONFIG_DYNAMIC_MMC_DEVNO
89#endif
90
Boris BREZILLON7832bf32015-03-04 13:13:05 +010091#endif /* __CONFIG_H */