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SARTRE Leodce71762013-06-03 23:30:36 +00001/*
2 *
3 * Congatec Conga-QEVAl board configuration file.
4 *
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
9 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
SARTRE Leodce71762013-06-03 23:30:36 +000011 */
12
13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
16#define CONFIG_MX6
17
18#include "mx6_common.h"
19
20#define CONFIG_DISPLAY_CPUINFO
21#define CONFIG_DISPLAY_BOARDINFO
22
23#define CONFIG_MACH_TYPE 4122
24
25#include <asm/arch/imx-regs.h>
26#include <asm/imx-common/gpio.h>
27
28#define CONFIG_CMDLINE_TAG
29#define CONFIG_SETUP_MEMORY_TAGS
30#define CONFIG_INITRD_TAG
31#define CONFIG_REVISION_TAG
32
33/* Size of malloc() pool */
34#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
35
36#define CONFIG_BOARD_EARLY_INIT_F
37#define CONFIG_MISC_INIT_R
38#define CONFIG_MXC_GPIO
39
40#define CONFIG_MXC_UART
41#define CONFIG_MXC_UART_BASE UART2_BASE
42
43/* MMC Configs */
44#define CONFIG_FSL_ESDHC
45#define CONFIG_FSL_USDHC
46#define CONFIG_SYS_FSL_ESDHC_ADDR 0
47
48#define CONFIG_MMC
49#define CONFIG_CMD_MMC
50#define CONFIG_GENERIC_MMC
51#define CONFIG_BOUNCE_BUFFER
52#define CONFIG_CMD_EXT2
53#define CONFIG_CMD_FAT
54#define CONFIG_DOS_PARTITION
55
56/* Miscellaneous commands */
57#define CONFIG_CMD_BMODE
58
59/* allow to overwrite serial and ethaddr */
60#define CONFIG_ENV_OVERWRITE
61#define CONFIG_CONS_INDEX 1
62#define CONFIG_BAUDRATE 115200
63
64/* Command definition */
65#include <config_cmd_default.h>
66
67#undef CONFIG_CMD_IMLS
68
69#define CONFIG_BOOTDELAY 3
70
71#define CONFIG_LOADADDR 0x12000000
72#define CONFIG_SYS_TEXT_BASE 0x17800000
73
74#define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
75
76#define CONFIG_EXTRA_ENV_SETTINGS \
77 "script=boot.scr\0" \
78 "uimage=uImage\0" \
79 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
80 "boot_dir=/boot\0" \
81 "console=ttymxc1\0" \
82 "fdt_high=0xffffffff\0" \
83 "initrd_high=0xffffffff\0" \
Otavio Salvador2abc2ae2013-12-16 20:44:04 -020084 "fdt_addr=0x18000000\0" \
SARTRE Leodce71762013-06-03 23:30:36 +000085 "boot_fdt=try\0" \
86 "mmcdev=1\0" \
87 "mmcpart=1\0" \
88 "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
89 "mmcargs=setenv bootargs console=${console},${baudrate} " \
90 "root=${mmcroot}\0" \
91 "loadbootscript=" \
92 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
93 "bootscript=echo Running bootscript from mmc ...; " \
94 "source\0" \
95 "loaduimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
96 "${boot_dir}/${uimage}\0" \
97 "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
98 "${boot_dir}/${fdt_file}\0" \
99 "mmcboot=echo Booting from mmc ...; " \
100 "run mmcargs; " \
101 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
102 "if run loadfdt; then " \
103 "bootm ${loadaddr} - ${fdt_addr}; " \
104 "else " \
105 "if test ${boot_fdt} = try; then " \
106 "bootm; " \
107 "else " \
108 "echo WARN: Cannot load the DT; " \
109 "fi; " \
110 "fi; " \
111 "else " \
112 "bootm; " \
113 "fi;\0"
114
115#define CONFIG_BOOTCOMMAND \
116 "mmc dev ${mmcdev};" \
117 "mmc dev ${mmcdev}; if mmc rescan; then " \
118 "if run loadbootscript; then " \
119 "run bootscript; " \
120 "else " \
121 "if run loaduimage; then " \
122 "run mmcboot; " \
123 "else "\
124 "echo ERR: Fail to boot from mmc; " \
125 "fi; " \
126 "fi; " \
127 "else echo ERR: Fail to boot from mmc; fi"
128
129/* Miscellaneous configurable options */
130#define CONFIG_SYS_LONGHELP
131#define CONFIG_SYS_HUSH_PARSER
132#define CONFIG_SYS_PROMPT "CGT-QMX6-Quad U-Boot > "
133#define CONFIG_AUTO_COMPLETE
134#define CONFIG_SYS_CBSIZE 256
135
136/* Print Buffer Size */
137#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
138#define CONFIG_SYS_MAXARGS 16
139#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
140
141#define CONFIG_SYS_MEMTEST_START 0x10000000
142#define CONFIG_SYS_MEMTEST_END 0x10010000
143#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
144
145#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
SARTRE Leodce71762013-06-03 23:30:36 +0000146
147#define CONFIG_CMDLINE_EDITING
148
149/* Physical Memory Map */
150#define CONFIG_NR_DRAM_BANKS 1
151#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
152#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
153
154#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
155#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
156#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
157
158#define CONFIG_SYS_INIT_SP_OFFSET \
159 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
160#define CONFIG_SYS_INIT_SP_ADDR \
161 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
162
163/* FLASH and environment organization */
164#define CONFIG_SYS_NO_FLASH
165
166#define CONFIG_ENV_SIZE (8 * 1024)
167
168#define CONFIG_ENV_IS_IN_MMC
169
170#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
171#define CONFIG_SYS_MMC_ENV_DEV 0
172
173#define CONFIG_OF_LIBFDT
174#define CONFIG_CMD_BOOTZ
175
176#ifndef CONFIG_SYS_DCACHE_OFF
177#define CONFIG_CMD_CACHE
178#endif
179
180#endif /* __CONFIG_CGTQMX6EVAL_H */