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git01.mediatek.com / filogic / uboot / 2aa4d8c90e956554cdf40183ac4c842d3adcda61 / . / arch / arm / dts / tegra30-lenovo-ideapad-yoga-11.dts
blob: 9a1e8c0601ef663b0324be4dbde69cad3a91fba9 [file] [log] [blame]
Jonas Schwöbel5e13ce22022-04-02 22:04:00 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra30.dtsi"
6
7/ {
8 model = "Lenovo Ideapad Yoga 11 Slate";
9 compatible = "lenovo,ideapad-yoga-11", "nvidia,tegra30";
10
11 chosen {
12 stdout-path = &uarta;
13 };
14
15 aliases {
16 i2c0 = &pwr_i2c;
17 i2c1 = &gen2_i2c;
18
19 mmc0 = &sdmmc4; /* eMMC */
20 mmc1 = &sdmmc1; /* uSD slot */
21
22 rtc0 = &pmic;
23 rtc1 = "/rtc@7000e000";
24
25 spi0 = &spi4;
26
27 usb0 = &usb1;
28 usb1 = &usb3;
29 };
30
31 memory {
32 device_type = "memory";
33 reg = <0x80000000 0x80000000>;
34 };
35
36 host1x@50000000 {
37 dc@54200000 {
38 rgb {
39 status = "okay";
40
41 nvidia,panel = <&bridge>;
42 };
43 };
44 };
45
46 pinmux@70000868 {
47 pinctrl-names = "default";
48 pinctrl-0 = <&state_default>;
49
50 state_default: pinmux {
51 /* SDMMC1 pinmux */
52 sdmmc1-clk {
53 nvidia,pins = "sdmmc1_clk_pz0";
54 nvidia,function = "sdmmc1";
55 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
56 nvidia,tristate = <TEGRA_PIN_DISABLE>;
57 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
58 };
59 sdmmc1-cmd {
60 nvidia,pins = "sdmmc1_dat3_py4",
61 "sdmmc1_dat2_py5",
62 "sdmmc1_dat1_py6",
63 "sdmmc1_dat0_py7",
64 "sdmmc1_cmd_pz1";
65 nvidia,function = "sdmmc1";
66 nvidia,pull = <TEGRA_PIN_PULL_UP>;
67 nvidia,tristate = <TEGRA_PIN_DISABLE>;
68 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
69 };
70
71 /* SDMMC3 pinmux */
72 sdmmc3-clk {
73 nvidia,pins = "sdmmc3_clk_pa6";
74 nvidia,function = "sdmmc3";
75 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
76 nvidia,tristate = <TEGRA_PIN_DISABLE>;
77 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
78 };
79 sdmmc3-cmd {
80 nvidia,pins = "sdmmc3_cmd_pa7",
81 "sdmmc3_dat3_pb4",
82 "sdmmc3_dat2_pb5",
83 "sdmmc3_dat1_pb6",
84 "sdmmc3_dat0_pb7";
85 nvidia,function = "sdmmc3";
86 nvidia,pull = <TEGRA_PIN_PULL_UP>;
87 nvidia,tristate = <TEGRA_PIN_DISABLE>;
88 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
89 };
90 sdmmc3-dat6 {
91 nvidia,pins = "sdmmc3_dat6_pd3";
92 nvidia,function = "sdmmc3";
93 nvidia,pull = <TEGRA_PIN_PULL_UP>;
94 nvidia,tristate = <TEGRA_PIN_ENABLE>;
95 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
96 };
97 sdmmc3-dat7 {
98 nvidia,pins = "sdmmc3_dat7_pd4";
99 nvidia,function = "spdif";
100 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
101 nvidia,tristate = <TEGRA_PIN_DISABLE>;
102 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
103 };
104
105 /* SDMMC4 pinmux */
106 sdmmc4-clk {
107 nvidia,pins = "sdmmc4_clk_pcc4";
108 nvidia,function = "sdmmc4";
109 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
110 nvidia,tristate = <TEGRA_PIN_DISABLE>;
111 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
112 nvidia,lock = <1>;
113 nvidia,io-reset = <1>;
114 };
115 sdmmc4-cmd {
116 nvidia,pins = "sdmmc4_cmd_pt7",
117 "sdmmc4_dat0_paa0",
118 "sdmmc4_dat1_paa1",
119 "sdmmc4_dat2_paa2",
120 "sdmmc4_dat3_paa3",
121 "sdmmc4_dat4_paa4",
122 "sdmmc4_dat5_paa5",
123 "sdmmc4_dat6_paa6",
124 "sdmmc4_dat7_paa7",
125 "sdmmc4_rst_n_pcc3";
126 nvidia,function = "sdmmc4";
127 nvidia,pull = <TEGRA_PIN_PULL_UP>;
128 nvidia,tristate = <TEGRA_PIN_DISABLE>;
129 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
130 nvidia,lock = <1>;
131 nvidia,io-reset = <1>;
132 };
133 cam-mclk {
134 nvidia,pins = "cam_mclk_pcc0";
135 nvidia,function = "vi_alt3";
136 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
137 nvidia,tristate = <TEGRA_PIN_DISABLE>;
138 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
139 };
140
141 /* I2C pinmux */
142 gen1-i2c {
143 nvidia,pins = "gen1_i2c_scl_pc4",
144 "gen1_i2c_sda_pc5";
145 nvidia,function = "i2c1";
146 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
147 nvidia,tristate = <TEGRA_PIN_DISABLE>;
148 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
149 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
150 nvidia,lock = <1>;
151 };
152 gen2-i2c {
153 nvidia,pins = "gen2_i2c_scl_pt5",
154 "gen2_i2c_sda_pt6";
155 nvidia,function = "i2c2";
156 nvidia,pull = <TEGRA_PIN_PULL_UP>;
157 nvidia,tristate = <TEGRA_PIN_DISABLE>;
158 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
159 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
160 nvidia,lock = <1>;
161 };
162 cam-i2c {
163 nvidia,pins = "cam_i2c_scl_pbb1",
164 "cam_i2c_sda_pbb2";
165 nvidia,function = "i2c3";
166 nvidia,pull = <TEGRA_PIN_PULL_UP>;
167 nvidia,tristate = <TEGRA_PIN_DISABLE>;
168 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
169 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
170 nvidia,lock = <1>;
171 };
172 ddc-i2c {
173 nvidia,pins = "ddc_scl_pv4",
174 "ddc_sda_pv5";
175 nvidia,function = "i2c4";
176 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
177 nvidia,tristate = <TEGRA_PIN_DISABLE>;
178 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
179 nvidia,lock = <1>;
180 };
181 pwr-i2c {
182 nvidia,pins = "pwr_i2c_scl_pz6",
183 "pwr_i2c_sda_pz7";
184 nvidia,function = "i2cpwr";
185 nvidia,pull = <TEGRA_PIN_PULL_UP>;
186 nvidia,tristate = <TEGRA_PIN_DISABLE>;
187 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
188 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
189 nvidia,lock = <1>;
190 };
191
192 /* HDMI pinmux */
193 hdmi-cec {
194 nvidia,pins = "hdmi_cec_pee3";
195 nvidia,function = "cec";
196 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
197 nvidia,tristate = <TEGRA_PIN_DISABLE>;
198 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
199 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
200 };
201 hdmi-int {
202 nvidia,pins = "hdmi_int_pn7";
203 nvidia,function = "rsvd1";
204 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
205 nvidia,tristate = <TEGRA_PIN_DISABLE>;
206 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
207 };
208
209 /* UART-A */
210 ulpi-data0 {
211 nvidia,pins = "ulpi_data0_po1";
212 nvidia,function = "uarta";
213 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 nvidia,tristate = <TEGRA_PIN_DISABLE>;
215 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
216 };
217 ulpi-data1 {
218 nvidia,pins = "ulpi_data1_po2";
219 nvidia,function = "uarta";
220 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
221 nvidia,tristate = <TEGRA_PIN_ENABLE>;
222 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
223 };
224 ulpi-data2 {
225 nvidia,pins = "ulpi_data2_po3";
226 nvidia,function = "uarta";
227 nvidia,pull = <TEGRA_PIN_PULL_UP>;
228 nvidia,tristate = <TEGRA_PIN_DISABLE>;
229 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
230 };
231
232 /* UART-B */
233 uartb-txd-rxd {
234 nvidia,pins = "uart2_txd_pc2",
235 "uart2_rxd_pc3";
236 nvidia,function = "uartb";
237 nvidia,pull = <TEGRA_PIN_PULL_UP>;
238 nvidia,tristate = <TEGRA_PIN_ENABLE>;
239 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
240 };
241 uartb-cts-rts {
242 nvidia,pins = "uart2_cts_n_pj5",
243 "uart2_rts_n_pj6";
244 nvidia,function = "gmi";
245 nvidia,pull = <TEGRA_PIN_PULL_UP>;
246 nvidia,tristate = <TEGRA_PIN_ENABLE>;
247 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
248 };
249
250 /* UART-C */
251 uartc-rxd-cts {
252 nvidia,pins = "uart3_cts_n_pa1",
253 "uart3_rxd_pw7";
254 nvidia,function = "uartc";
255 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
256 nvidia,tristate = <TEGRA_PIN_DISABLE>;
257 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
258 };
259 uartc-txd-rts {
260 nvidia,pins = "uart3_rts_n_pc0",
261 "uart3_txd_pw6";
262 nvidia,function = "uartc";
263 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
264 nvidia,tristate = <TEGRA_PIN_DISABLE>;
265 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
266 };
267
268 /* I2S pinmux */
269 dap1-fs {
270 nvidia,pins = "dap1_fs_pn0";
271 nvidia,function = "i2s0";
272 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
273 nvidia,tristate = <TEGRA_PIN_DISABLE>;
274 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
275 };
276 dap1-din {
277 nvidia,pins = "dap1_din_pn1",
278 "dap1_dout_pn2",
279 "dap1_sclk_pn3";
280 nvidia,function = "i2s0";
281 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
282 nvidia,tristate = <TEGRA_PIN_ENABLE>;
283 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
284 };
285 dap2-fs-pa2 {
286 nvidia,pins = "dap2_fs_pa2",
287 "dap2_sclk_pa3",
288 "dap2_din_pa4",
289 "dap2_dout_pa5";
290 nvidia,function = "i2s1";
291 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
292 nvidia,tristate = <TEGRA_PIN_DISABLE>;
293 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
294 };
295 dap3-fs-pp0 {
296 nvidia,pins = "dap3_fs_pp0",
297 "dap3_din_pp1",
298 "dap3_dout_pp2";
299 nvidia,function = "i2s2";
300 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
301 nvidia,tristate = <TEGRA_PIN_DISABLE>;
302 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
303 };
304 dap3-sclk-pp3 {
305 nvidia,pins = "dap3_sclk_pp3";
306 nvidia,function = "i2s2";
307 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
308 nvidia,tristate = <TEGRA_PIN_ENABLE>;
309 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
310 };
311 dap4-fs-pp4 {
312 nvidia,pins = "dap4_fs_pp4",
313 "dap4_din_pp5",
314 "dap4_dout_pp6",
315 "dap4_sclk_pp7";
316 nvidia,function = "i2s3";
317 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
318 nvidia,tristate = <TEGRA_PIN_ENABLE>;
319 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
320 };
321 pbb0 {
322 nvidia,pins = "pbb0", "pbb7";
323 nvidia,function = "i2s4";
324 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
325 nvidia,tristate = <TEGRA_PIN_DISABLE>;
326 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
327 };
328 pcc1 {
329 nvidia,pins = "pcc1";
330 nvidia,function = "i2s4";
331 nvidia,pull = <TEGRA_PIN_PULL_UP>;
332 nvidia,tristate = <TEGRA_PIN_ENABLE>;
333 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
334 };
335 pcc2 {
336 nvidia,pins = "pcc2";
337 nvidia,function = "i2s4";
338 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
339 nvidia,tristate = <TEGRA_PIN_ENABLE>;
340 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
341 };
342
343 /* PCI-e pinmux */
344 pex-l2-rst-n {
345 nvidia,pins = "pex_l2_rst_n_pcc6",
346 "pex_l2_clkreq_n_pcc7",
347 "pex_l0_prsnt_n_pdd0",
348 "pex_l0_rst_n_pdd1",
349 "pex_l0_clkreq_n_pdd2",
350 "pex_wake_n_pdd3",
351 "pex_l1_prsnt_n_pdd4",
352 "pex_l1_rst_n_pdd5",
353 "pex_l1_clkreq_n_pdd6",
354 "pex_l2_prsnt_n_pdd7";
355 nvidia,function = "pcie";
356 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
357 nvidia,tristate = <TEGRA_PIN_ENABLE>;
358 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
359 };
360
361 /* SPI pinmux */
362 spi1-miso-px7 {
363 nvidia,pins = "spi1_miso_px7";
364 nvidia,function = "spi1";
365 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
366 nvidia,tristate = <TEGRA_PIN_ENABLE>;
367 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
368 };
369 ulpi-clk-py0 {
370 nvidia,pins = "ulpi_clk_py0",
371 "ulpi_dir_py1",
372 "ulpi_nxt_py2",
373 "ulpi_stp_py3";
374 nvidia,function = "spi1";
375 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
376 nvidia,tristate = <TEGRA_PIN_ENABLE>;
377 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
378 };
379 ulpi-data7-po0 {
380 nvidia,pins = "ulpi_data7_po0",
381 "ulpi_data5_po6",
382 "ulpi_data6_po7",
383 "spi1_mosi_px4",
384 "spi1_sck_px5";
385 nvidia,function = "spi2";
386 nvidia,pull = <TEGRA_PIN_PULL_UP>;
387 nvidia,tristate = <TEGRA_PIN_ENABLE>;
388 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
389 };
390 ulpi-data4-po5 {
391 nvidia,pins = "ulpi_data4_po5";
392 nvidia,function = "spi2";
393 nvidia,pull = <TEGRA_PIN_PULL_UP>;
394 nvidia,tristate = <TEGRA_PIN_DISABLE>;
395 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
396 };
397 spi1-cs0-n-px6 {
398 nvidia,pins = "spi1_cs0_n_px6";
399 nvidia,function = "spi2";
400 nvidia,pull = <TEGRA_PIN_PULL_UP>;
401 nvidia,tristate = <TEGRA_PIN_DISABLE>;
402 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
403 };
404 ulpi-data3-po4 {
405 nvidia,pins = "ulpi_data3_po4";
406 nvidia,function = "spi3";
407 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
408 nvidia,tristate = <TEGRA_PIN_ENABLE>;
409 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
410 };
411 spi2-cs1-n-pw2 {
412 nvidia,pins = "spi2_cs1_n_pw2",
413 "spi2_cs2_n_pw3";
414 nvidia,function = "spi3";
415 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
416 nvidia,tristate = <TEGRA_PIN_DISABLE>;
417 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
418 };
419 gmi-a17-pb0 {
420 nvidia,pins = "gmi_a17_pb0",
421 "gmi_a18_pb1",
422 "gmi_a16_pj7",
423 "gmi_a19_pk7";
424 nvidia,function = "spi4";
425 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
426 nvidia,tristate = <TEGRA_PIN_DISABLE>;
427 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
428 };
429 spi2-mosi-px0 {
430 nvidia,pins = "spi2_mosi_px0";
431 nvidia,function = "spi6";
432 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
433 nvidia,tristate = <TEGRA_PIN_ENABLE>;
434 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
435 };
436 spi2-miso-px1 {
437 nvidia,pins = "spi2_miso_px1";
438 nvidia,function = "spi6";
439 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
440 nvidia,tristate = <TEGRA_PIN_ENABLE>;
441 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
442 };
443 spi2-sck-px2 {
444 nvidia,pins = "spi2_sck_px2";
445 nvidia,function = "spi6";
446 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
447 nvidia,tristate = <TEGRA_PIN_DISABLE>;
448 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
449 };
450
451 /* Display A pinmux */
452 lcd-pclk {
453 nvidia,pins = "lcd_pclk_pb3",
454 "lcd_dc1_pd2",
455 "lcd_d0_pe0",
456 "lcd_d1_pe1",
457 "lcd_d2_pe2",
458 "lcd_d3_pe3",
459 "lcd_d4_pe4",
460 "lcd_d5_pe5",
461 "lcd_d6_pe6",
462 "lcd_d7_pe7",
463 "lcd_d8_pf0",
464 "lcd_d9_pf1",
465 "lcd_d10_pf2",
466 "lcd_d11_pf3",
467 "lcd_d12_pf4",
468 "lcd_d13_pf5",
469 "lcd_d14_pf6",
470 "lcd_d15_pf7",
471 "lcd_de_pj1",
472 "lcd_d16_pm0",
473 "lcd_d17_pm1",
474 "lcd_d18_pm2",
475 "lcd_d19_pm3",
476 "lcd_d20_pm4",
477 "lcd_d21_pm5",
478 "lcd_d22_pm6",
479 "lcd_d23_pm7",
480 "lcd_sdout_pn5",
481 "lcd_dc0_pn6",
482 "lcd_m1_pw1",
483 "lcd_sdin_pz2",
484 "lcd_sck_pz4";
485 nvidia,function = "displaya";
486 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
487 nvidia,tristate = <TEGRA_PIN_DISABLE>;
488 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
489 };
490 lcd-pwr0 {
491 nvidia,pins = "lcd_pwr0_pb2",
492 "lcd_pwr2_pc6";
493 nvidia,function = "displaya";
494 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
495 nvidia,tristate = <TEGRA_PIN_ENABLE>;
496 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
497 };
498 lcd-pwr1 {
499 nvidia,pins = "lcd_pwr1_pc1";
500 nvidia,function = "displaya";
501 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
502 nvidia,tristate = <TEGRA_PIN_DISABLE>;
503 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
504 };
505 lcd-hsync {
506 nvidia,pins = "lcd_hsync_pj3",
507 "lcd_vsync_pj4",
508 "lcd_cs0_n_pn4",
509 "lcd_cs1_n_pw0",
510 "lcd_wr_n_pz3";
511 nvidia,function = "displaya";
512 nvidia,pull = <TEGRA_PIN_PULL_UP>;
513 nvidia,tristate = <TEGRA_PIN_DISABLE>;
514 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
515 };
516 crt-hsync-pv6 {
517 nvidia,pins = "crt_hsync_pv6",
518 "crt_vsync_pv7";
519 nvidia,function = "crt";
520 nvidia,pull = <TEGRA_PIN_PULL_UP>;
521 nvidia,tristate = <TEGRA_PIN_ENABLE>;
522 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
523 };
524
525 blink {
526 nvidia,pins = "clk_32k_out_pa0";
527 nvidia,function = "blink";
528 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
529 nvidia,tristate = <TEGRA_PIN_DISABLE>;
530 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
531 };
532
533 /* KBC keys */
534 kb-pins {
535 nvidia,pins = "kb_col0_pq0",
536 "kb_col1_pq1",
537 "kb_col2_pq2",
538 "kb_col3_pq3",
539 "kb_col4_pq4",
540 "kb_col5_pq5",
541 "kb_col6_pq6",
542 "kb_col7_pq7",
543 "kb_row0_pr0",
544 "kb_row1_pr1",
545 "kb_row2_pr2",
546 "kb_row3_pr3",
547 "kb_row4_pr4",
548 "kb_row5_pr5",
549 "kb_row6_pr6",
550 "kb_row7_pr7",
551 "kb_row8_ps0",
552 "kb_row9_ps1",
553 "kb_row10_ps2",
554 "kb_row11_ps3",
555 "kb_row12_ps4",
556 "kb_row13_ps5",
557 "kb_row14_ps6",
558 "kb_row15_ps7";
559 nvidia,function = "kbc";
560 nvidia,pull = <TEGRA_PIN_PULL_UP>;
561 nvidia,tristate = <TEGRA_PIN_DISABLE>;
562 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
563 };
564
565 /* SPDIF pinmux */
566 spdif-pins {
567 nvidia,pins = "spdif_out_pk5",
568 "spdif_in_pk6";
569 nvidia,function = "spdif";
570 nvidia,pull = <TEGRA_PIN_PULL_UP>;
571 nvidia,tristate = <TEGRA_PIN_DISABLE>;
572 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
573 };
574
575 jtag-rtck {
576 nvidia,pins = "jtag_rtck_pu7";
577 nvidia,function = "rtck";
578 nvidia,pull = <TEGRA_PIN_PULL_UP>;
579 nvidia,tristate = <TEGRA_PIN_DISABLE>;
580 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
581 };
582
583 /* GMI pinmux */
584 gmi-wp-n-pc7 {
585 nvidia,pins = "gmi_wp_n_pc7";
586 nvidia,function = "gmi";
587 nvidia,pull = <TEGRA_PIN_PULL_UP>;
588 nvidia,tristate = <TEGRA_PIN_ENABLE>;
589 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
590 };
591 sdmmc3-dat5-pd0 {
592 nvidia,pins = "sdmmc3_dat5_pd0",
593 "gmi_ad8_ph0";
594 nvidia,function = "pwm0";
595 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
596 nvidia,tristate = <TEGRA_PIN_DISABLE>;
597 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
598 };
599 sdmmc3-dat4-pd1 {
600 nvidia,pins = "sdmmc3_dat4_pd1";
601 nvidia,function = "pwm1";
602 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
603 nvidia,tristate = <TEGRA_PIN_DISABLE>;
604 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
605 };
606 gmi-ad12-ph4 {
607 nvidia,pins = "gmi_ad12_ph4",
608 "gmi_cs4_n_pk2",
609 "pv1";
610 nvidia,function = "rsvd1";
611 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
612 nvidia,tristate = <TEGRA_PIN_ENABLE>;
613 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
614 };
615 gmi-dqs-pi2 {
616 nvidia,pins = "gmi_dqs_pi2";
617 nvidia,function = "rsvd1";
618 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
619 nvidia,tristate = <TEGRA_PIN_ENABLE>;
620 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
621 };
622 gmi-ad13-ph5 {
623 nvidia,pins = "gmi_ad13_ph5",
624 "gmi_ad14_ph6",
625 "pu1",
626 "pu2",
627 "pv2",
628 "pv3";
629 nvidia,function = "rsvd1";
630 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
631 nvidia,tristate = <TEGRA_PIN_DISABLE>;
632 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
633 };
634 gmi-ad0-pg0 {
635 nvidia,pins = "gmi_ad0_pg0",
636 "gmi_ad1_pg1",
637 "gmi_ad2_pg2",
638 "gmi_ad3_pg3",
639 "gmi_ad4_pg4",
640 "gmi_ad5_pg5",
641 "gmi_ad6_pg6",
642 "gmi_ad7_pg7",
643 "gmi_ad15_ph7";
644 nvidia,function = "gmi";
645 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
646 nvidia,tristate = <TEGRA_PIN_ENABLE>;
647 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
648 };
649 gmi-ad9-ph1 {
650 nvidia,pins = "gmi_ad9_ph1";
651 nvidia,function = "gmi";
652 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
653 nvidia,tristate = <TEGRA_PIN_ENABLE>;
654 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
655 };
656 gmi-ad10-ph2 {
657 nvidia,pins = "gmi_ad10_ph2";
658 nvidia,function = "pwm2";
659 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
660 nvidia,tristate = <TEGRA_PIN_DISABLE>;
661 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
662 };
663 gmi-ad11-ph3 {
664 nvidia,pins = "gmi_ad11_ph3";
665 nvidia,function = "pwm3";
666 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
667 nvidia,tristate = <TEGRA_PIN_DISABLE>;
668 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
669 };
670 gmi-wr-n-pi0 {
671 nvidia,pins = "gmi_wr_n_pi0",
672 "gmi_oe_n_pi1",
673 "gmi_adv_n_pk0",
674 "gmi_clk_pk1";
675 nvidia,function = "gmi";
676 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
677 nvidia,tristate = <TEGRA_PIN_DISABLE>;
678 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
679 };
680 gmi-cs6-n-pi3 {
681 nvidia,pins = "gmi_cs6_n_pi3",
682 "gmi_cs7_n_pi6";
683 nvidia,function = "nand";
684 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
685 nvidia,tristate = <TEGRA_PIN_DISABLE>;
686 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
687 };
688 gmi-iordy-pi5 {
689 nvidia,pins = "gmi_iordy_pi5";
690 nvidia,function = "rsvd1";
691 nvidia,pull = <TEGRA_PIN_PULL_UP>;
692 nvidia,tristate = <TEGRA_PIN_ENABLE>;
693 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
694 };
695 gmi-wait-pi7 {
696 nvidia,pins = "gmi_wait_pi7";
697 nvidia,function = "gmi";
698 nvidia,pull = <TEGRA_PIN_PULL_UP>;
699 nvidia,tristate = <TEGRA_PIN_DISABLE>;
700 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
701 };
702 gmi-cs0-n-pj0 {
703 nvidia,pins = "gmi_cs0_n_pj0",
704 "gmi_cs1_n_pj2",
705 "gmi_cs2_n_pk3";
706 nvidia,function = "rsvd1";
707 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
708 nvidia,tristate = <TEGRA_PIN_DISABLE>;
709 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
710 };
711 gmi-cs3-n-pk4 {
712 nvidia,pins = "gmi_cs3_n_pk4",
713 "pv0";
714 nvidia,function = "rsvd1";
715 nvidia,pull = <TEGRA_PIN_PULL_UP>;
716 nvidia,tristate = <TEGRA_PIN_DISABLE>;
717 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
718 };
719
720 /* VI pinmux */
721 vi-d1-pd5 {
722 nvidia,pins = "vi_d1_pd5";
723 nvidia,function = "rsvd1";
724 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
725 nvidia,tristate = <TEGRA_PIN_ENABLE>;
726 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
727 nvidia,lock = <1>;
728 nvidia,io-reset = <1>;
729 };
730 vi-vsync-pd6 {
731 nvidia,pins = "vi_vsync_pd6",
732 "vi_d7_pl5",
733 "vi_d10_pt2",
734 "vi_d0_pt4";
735 nvidia,function = "rsvd1";
736 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
737 nvidia,tristate = <TEGRA_PIN_ENABLE>;
738 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
739 nvidia,lock = <1>;
740 nvidia,io-reset = <2>;
741 };
742 vi-hsync-pd7 {
743 nvidia,pins = "vi_hsync_pd7",
744 "vi_d6_pl4",
745 "vi_d8_pl6",
746 "vi_d9_pl7",
747 "vi_pclk_pt0";
748 nvidia,function = "rsvd1";
749 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
750 nvidia,tristate = <TEGRA_PIN_DISABLE>;
751 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
752 nvidia,lock = <1>;
753 nvidia,io-reset = <1>;
754 };
755 vi-d2-pl0 {
756 nvidia,pins = "vi_d2_pl0",
757 "vi_d3_pl1",
758 "vi_d4_pl2";
759 nvidia,function = "rsvd1";
760 nvidia,pull = <TEGRA_PIN_PULL_UP>;
761 nvidia,tristate = <TEGRA_PIN_DISABLE>;
762 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
763 nvidia,lock = <1>;
764 nvidia,io-reset = <1>;
765 };
766 vi-mclk-pt1 {
767 nvidia,pins = "vi_mclk_pt1";
768 nvidia,function = "vi";
769 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
770 nvidia,tristate = <TEGRA_PIN_ENABLE>;
771 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
772 nvidia,lock = <1>;
773 nvidia,io-reset = <2>;
774 };
775 vi-d11-pt3 {
776 nvidia,pins = "vi_d11_pt3";
777 nvidia,function = "rsvd1";
778 nvidia,pull = <TEGRA_PIN_PULL_UP>;
779 nvidia,tristate = <TEGRA_PIN_ENABLE>;
780 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
781 nvidia,lock = <1>;
782 nvidia,io-reset = <1>;
783 };
784 vi-d5-pl3 {
785 nvidia,pins = "vi_d5_pl3";
786 nvidia,function = "rsvd1";
787 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
788 nvidia,tristate = <TEGRA_PIN_DISABLE>;
789 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
790 nvidia,lock = <1>;
791 nvidia,io-reset = <1>;
792 };
793
794 /* PORT U */
795 pu0 {
796 nvidia,pins = "pu0";
797 nvidia,function = "owr";
798 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
799 nvidia,tristate = <TEGRA_PIN_DISABLE>;
800 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
801 };
802 pu3 {
803 nvidia,pins = "pu3";
804 nvidia,function = "pwm0";
805 nvidia,pull = <TEGRA_PIN_PULL_UP>;
806 nvidia,tristate = <TEGRA_PIN_DISABLE>;
807 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
808 };
809 pu4 {
810 nvidia,pins = "pu4";
811 nvidia,function = "pwm1";
812 nvidia,pull = <TEGRA_PIN_PULL_UP>;
813 nvidia,tristate = <TEGRA_PIN_DISABLE>;
814 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
815 };
816 pu5 {
817 nvidia,pins = "pu5";
818 nvidia,function = "pwm2";
819 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
820 nvidia,tristate = <TEGRA_PIN_ENABLE>;
821 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
822 };
823 pu6 {
824 nvidia,pins = "pu6";
825 nvidia,function = "pwm3";
826 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
827 nvidia,tristate = <TEGRA_PIN_ENABLE>;
828 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
829 };
830
831 /* PORT BB */
832 pbb3 {
833 nvidia,pins = "pbb3";
834 nvidia,function = "vgp3";
835 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
836 nvidia,tristate = <TEGRA_PIN_DISABLE>;
837 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
838 };
839 pbb4 {
840 nvidia,pins = "pbb4";
841 nvidia,function = "vgp4";
842 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
843 nvidia,tristate = <TEGRA_PIN_DISABLE>;
844 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
845 };
846 pbb5 {
847 nvidia,pins = "pbb5";
848 nvidia,function = "vgp5";
849 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
850 nvidia,tristate = <TEGRA_PIN_ENABLE>;
851 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
852 };
853 pbb6 {
854 nvidia,pins = "pbb6";
855 nvidia,function = "vgp6";
856 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
857 nvidia,tristate = <TEGRA_PIN_ENABLE>;
858 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
859 };
860
861 /* CLK pinmux */
862 clk1-out {
863 nvidia,pins = "clk1_out_pw4";
864 nvidia,function = "extperiph1";
865 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
866 nvidia,tristate = <TEGRA_PIN_DISABLE>;
867 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
868 };
869 clk1-req {
870 nvidia,pins = "clk1_req_pee2";
871 nvidia,function = "dap";
872 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
873 nvidia,tristate = <TEGRA_PIN_DISABLE>;
874 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
875 };
876 clk2-out {
877 nvidia,pins = "clk2_out_pw5";
878 nvidia,function = "extperiph2";
879 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
880 nvidia,tristate = <TEGRA_PIN_DISABLE>;
881 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
882 };
883 clk2-req {
884 nvidia,pins = "clk2_req_pcc5";
885 nvidia,function = "dap";
886 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
887 nvidia,tristate = <TEGRA_PIN_ENABLE>;
888 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
889 };
890 clk3-out {
891 nvidia,pins = "clk3_out_pee0";
892 nvidia,function = "extperiph3";
893 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
894 nvidia,tristate = <TEGRA_PIN_DISABLE>;
895 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
896 };
897 clk3-req {
898 nvidia,pins = "clk3_req_pee1";
899 nvidia,function = "dev3";
900 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
901 nvidia,tristate = <TEGRA_PIN_DISABLE>;
902 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
903 };
904 sys-clk-req {
905 nvidia,pins = "sys_clk_req_pz5";
906 nvidia,function = "sysclk";
907 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
908 nvidia,tristate = <TEGRA_PIN_DISABLE>;
909 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
910 };
911
912 owr {
913 nvidia,pins = "owr";
914 nvidia,function = "owr";
915 nvidia,pull = <TEGRA_PIN_PULL_UP>;
916 nvidia,tristate = <TEGRA_PIN_DISABLE>;
917 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
918 };
919
920 /* GPIO power/drive control */
921 drive-sdio1 {
922 nvidia,pins = "drive_sdio1",
923 "drive_sdio3";
924 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
925 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
926 nvidia,pull-down-strength = <46>;
927 nvidia,pull-up-strength = <42>;
928 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
929 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
930 };
931 };
932 };
933
934 uarta: serial@70006000 {
935 status = "okay";
936 };
937
938 pwm: pwm@7000a000 {
939 status = "okay";
940 };
941
942 gen2_i2c: i2c@7000c400 {
943 status = "okay";
944 clock-frequency = <100000>;
945
946 bridge: dp501@8 {
947 compatible = "parade,dp501";
948 reg = <0x08>;
949
950 enable-gpios = <&gpio TEGRA_GPIO(C, 1) GPIO_ACTIVE_HIGH>;
951 reset-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_LOW>;
952
953 power-supply = <&vdd_edp_reg>;
954
955 panel = <&panel>;
956 };
957 };
958
959 pwr_i2c: i2c@7000d000 {
960 status = "okay";
961 clock-frequency = <400000>;
962
963 /* Texas Instruments TPS659110 PMIC */
964 pmic: tps65911@2d {
965 compatible = "ti,tps65911";
966 reg = <0x2d>;
967
968 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
969 #interrupt-cells = <2>;
970 interrupt-controller;
971
972 ti,system-power-controller;
973
974 #gpio-cells = <2>;
975 gpio-controller;
976
977 regulators {
978 vdd_1v8_vio: vddio {
979 regulator-name = "vdd_1v8_gen";
980 regulator-min-microvolt = <1800000>;
981 regulator-max-microvolt = <1800000>;
982 regulator-always-on;
983 regulator-boot-on;
984 };
985
986 vddio_usd: ldo3 {
987 regulator-name = "vddio_usd";
988 regulator-min-microvolt = <3300000>;
989 regulator-max-microvolt = <3300000>;
990 regulator-always-on;
991 regulator-boot-on;
992 };
993 };
994 };
995 };
996
997 spi4: spi@7000da00 {
998 status = "okay";
999 spi-max-frequency = <25000000>;
1000
1001 spi-flash@1 {
1002 compatible = "winbond,w25q32", "jedec,spi-nor";
1003 reg = <1>;
1004 spi-max-frequency = <20000000>;
1005 };
1006 };
1007
1008 kbc@7000e200 {
1009 status = "okay";
1010 nvidia,debounce-delay-ms = <2>;
1011 nvidia,repeat-delay-ms = <160>;
1012 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
1013 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
1014
1015 linux,keymap = <
1016 MATRIX_KEY(0x00, 0x01, KEY_TAB)
1017 MATRIX_KEY(0x00, 0x02, KEY_GRAVE)
1018 MATRIX_KEY(0x00, 0x03, KEY_1)
1019 MATRIX_KEY(0x00, 0x04, KEY_Q)
1020 MATRIX_KEY(0x00, 0x05, KEY_A)
1021
1022 MATRIX_KEY(0x01, 0x06, KEY_RIGHTALT)
1023 MATRIX_KEY(0x01, 0x07, KEY_LEFTALT)
1024
1025 MATRIX_KEY(0x02, 0x00, KEY_F3)
1026 MATRIX_KEY(0x02, 0x01, KEY_F4)
1027 MATRIX_KEY(0x02, 0x02, KEY_CAPSLOCK)
1028 MATRIX_KEY(0x02, 0x03, KEY_3)
1029 MATRIX_KEY(0x02, 0x04, KEY_E)
1030 MATRIX_KEY(0x02, 0x05, KEY_D)
1031 MATRIX_KEY(0x02, 0x06, KEY_C)
1032 MATRIX_KEY(0x02, 0x07, KEY_SPACE)
1033
1034 MATRIX_KEY(0x03, 0x00, KEY_F2)
1035 MATRIX_KEY(0x03, 0x01, KEY_F1)
1036 MATRIX_KEY(0x03, 0x02, KEY_ESC)
1037 MATRIX_KEY(0x03, 0x03, KEY_2)
1038 MATRIX_KEY(0x03, 0x04, KEY_W)
1039 MATRIX_KEY(0x03, 0x05, KEY_S)
1040 MATRIX_KEY(0x03, 0x06, KEY_X)
1041 MATRIX_KEY(0x03, 0x07, KEY_Z)
1042
1043 MATRIX_KEY(0x04, 0x00, KEY_LEFTCTRL)
1044
1045 MATRIX_KEY(0x05, 0x00, KEY_G)
1046 MATRIX_KEY(0x05, 0x01, KEY_T)
1047 MATRIX_KEY(0x05, 0x02, KEY_5)
1048 MATRIX_KEY(0x05, 0x03, KEY_4)
1049 MATRIX_KEY(0x05, 0x04, KEY_R)
1050 MATRIX_KEY(0x05, 0x05, KEY_F)
1051 MATRIX_KEY(0x05, 0x06, KEY_V)
1052 MATRIX_KEY(0x05, 0x07, KEY_B)
1053
1054 MATRIX_KEY(0x06, 0x00, KEY_H)
1055 MATRIX_KEY(0x06, 0x01, KEY_Y)
1056 MATRIX_KEY(0x06, 0x02, KEY_6)
1057 MATRIX_KEY(0x06, 0x03, KEY_7)
1058 MATRIX_KEY(0x06, 0x04, KEY_U)
1059 MATRIX_KEY(0x06, 0x05, KEY_J)
1060 MATRIX_KEY(0x06, 0x06, KEY_M)
1061 MATRIX_KEY(0x06, 0x07, KEY_N)
1062
1063 MATRIX_KEY(0x07, 0x01, KEY_F11)
1064 MATRIX_KEY(0x07, 0x02, KEY_F10)
1065 MATRIX_KEY(0x07, 0x03, KEY_9)
1066 MATRIX_KEY(0x07, 0x04, KEY_O)
1067 MATRIX_KEY(0x07, 0x05, KEY_L)
1068 MATRIX_KEY(0x07, 0x06, KEY_DOT)
1069 MATRIX_KEY(0x07, 0x07, KEY_DOWN)
1070
1071 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
1072 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
1073
1074 MATRIX_KEY(0x09, 0x00, KEY_F7)
1075 MATRIX_KEY(0x09, 0x01, KEY_F6)
1076 MATRIX_KEY(0x09, 0x02, KEY_F5)
1077 MATRIX_KEY(0x09, 0x03, KEY_8)
1078 MATRIX_KEY(0x09, 0x04, KEY_I)
1079 MATRIX_KEY(0x09, 0x05, KEY_K)
1080 MATRIX_KEY(0x09, 0x06, KEY_COMMA)
1081
1082 MATRIX_KEY(0x0A, 0x00, KEY_F8)
1083 MATRIX_KEY(0x0A, 0x01, KEY_F9)
1084 MATRIX_KEY(0x0A, 0x02, KEY_BACKSLASH)
1085 MATRIX_KEY(0x0A, 0x03, KEY_102ND)
1086 MATRIX_KEY(0x0A, 0x04, KEY_COMPOSE)
1087 MATRIX_KEY(0x0A, 0x05, KEY_LEFT)
1088
1089 MATRIX_KEY(0x0B, 0x00, KEY_RIGHTCTRL)
1090 MATRIX_KEY(0x0B, 0x03, KEY_FN)
1091
1092 MATRIX_KEY(0x0C, 0x02, KEY_LEFTMETA)
1093
1094 MATRIX_KEY(0x0D, 0x00, KEY_MINUS)
1095 MATRIX_KEY(0x0D, 0x02, KEY_0)
1096 MATRIX_KEY(0x0D, 0x03, KEY_P)
1097 MATRIX_KEY(0x0D, 0x04, KEY_LEFTBRACE)
1098 MATRIX_KEY(0x0D, 0x05, KEY_SEMICOLON)
1099 MATRIX_KEY(0x0D, 0x06, KEY_SLASH)
1100 MATRIX_KEY(0x0D, 0x07, KEY_UP)
1101
1102 MATRIX_KEY(0x0E, 0x01, KEY_PRINT)
1103 MATRIX_KEY(0x0E, 0x02, KEY_EQUAL)
1104 MATRIX_KEY(0x0E, 0x03, KEY_BACKSPACE)
1105 MATRIX_KEY(0x0E, 0x04, KEY_RIGHTBRACE)
1106 MATRIX_KEY(0x0E, 0x06, KEY_APOSTROPHE)
1107 MATRIX_KEY(0x0E, 0x07, KEY_ENTER)
1108
1109 MATRIX_KEY(0x0F, 0x02, KEY_DELETE)
1110 MATRIX_KEY(0x0F, 0x03, KEY_PAGEUP)
1111 MATRIX_KEY(0x0F, 0x04, KEY_INSERT)
1112 MATRIX_KEY(0x0F, 0x05, KEY_F12)
1113 MATRIX_KEY(0x0F, 0x06, KEY_PAGEDOWN)
1114 MATRIX_KEY(0x0F, 0x07, KEY_RIGHT)
1115 >;
1116 };
1117
1118 sdmmc1: sdhci@78000000 {
1119 status = "okay";
1120 bus-width = <4>;
1121
1122 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1123
1124 vmmc-supply = <&vdd_usd>;
1125 vqmmc-supply = <&vddio_usd>;
1126 };
1127
1128 sdmmc4: sdhci@78000600 {
1129 status = "okay";
1130 bus-width = <8>;
1131 non-removable;
1132
1133 vmmc-supply = <&vcore_emmc>;
1134 vqmmc-supply = <&vdd_1v8_vio>;
1135 };
1136
1137 /* LEFT */
1138 usb1: usb@7d000000 {
1139 status = "okay";
1140 dr_mode = "otg";
1141 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
1142 };
1143
1144 /* RIGHT */
1145 usb3: usb@7d008000 {
1146 status = "okay";
1147 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1148 };
1149
1150 backlight: backlight {
1151 compatible = "pwm-backlight";
1152
1153 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1154 pwms = <&pwm 0 4000000>;
1155
1156 brightness-levels = <1 35 70 105 140 175 210 255>;
1157 default-brightness-level = <5>;
1158 };
1159
1160 clk32k_in: clock-32k {
1161 compatible = "fixed-clock";
1162 #clock-cells = <0>;
1163 clock-frequency = <32768>;
1164 clock-output-names = "ref-oscillator";
1165 };
1166
1167 extcon-keys {
1168 compatible = "gpio-keys";
1169
1170 switch-hall-sensor {
1171 label = "Lid sensor";
1172 gpios = <&gpio TEGRA_GPIO(J, 2) GPIO_ACTIVE_LOW>;
1173 linux,code = <SW_LID>;
1174 };
1175
1176 switch-rotation-lock {
1177 label = "Rotation Lock";
1178 gpios = <&gpio TEGRA_GPIO(K, 4) GPIO_ACTIVE_LOW>;
1179 linux,code = <SW_ROTATE_LOCK>;
1180 };
1181 };
1182
1183 gpio-keys {
1184 compatible = "gpio-keys";
1185
1186 key-power {
1187 label = "Power";
1188 gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
1189 linux,code = <KEY_ENTER>;
1190 };
1191
1192 key-volume-down {
1193 label = "Volume Down";
1194 gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
1195 linux,code = <KEY_DOWN>;
1196 };
1197
1198 key-volume-up {
1199 label = "Volume Up";
1200 gpios = <&gpio TEGRA_GPIO(K, 5) GPIO_ACTIVE_LOW>;
1201 linux,code = <KEY_UP>;
1202 };
1203
1204 key-windows-button {
1205 label = "Windows Button";
1206 gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>;
1207 linux,code = <KEY_ENTER>;
1208 };
1209 };
1210
1211 leds {
1212 compatible = "gpio-leds";
1213
1214 led-capslock {
1215 label = "Capslock";
1216 gpios = <&gpio TEGRA_GPIO(U, 2) GPIO_ACTIVE_HIGH>;
1217 linux,default-trigger = "kbd-capslock";
1218 default-state = "off";
1219 };
1220 };
1221
1222 panel: panel {
1223 compatible = "simple-panel";
1224
1225 power-supply = <&vdd_pnl_reg>;
1226 ddc-i2c-bus = <&gen2_i2c>;
1227
1228 backlight = <&backlight>;
1229 };
1230
1231 vdd_edp_reg: regulator-edp {
1232 compatible = "regulator-fixed";
1233 regulator-name = "vdd_edp";
1234 regulator-min-microvolt = <1200000>;
1235 regulator-max-microvolt = <1200000>;
1236 gpio = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
1237 enable-active-high;
1238 };
1239
1240 vcore_emmc: regulator-emmc {
1241 compatible = "regulator-fixed";
1242 regulator-name = "vdd_emmc_core";
1243 regulator-min-microvolt = <3300000>;
1244 regulator-max-microvolt = <3300000>;
1245 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
1246 enable-active-high;
1247 };
1248
1249 vdd_pnl_reg: regulator-pnl {
1250 compatible = "regulator-fixed";
1251 regulator-name = "vdd_panel";
1252 regulator-min-microvolt = <3300000>;
1253 regulator-max-microvolt = <3300000>;
1254 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
1255 enable-active-high;
1256 };
1257
1258 vdd_usd: regulator-usd {
1259 compatible = "regulator-fixed";
1260 regulator-name = "vdd_usd";
1261 regulator-min-microvolt = <3300000>;
1262 regulator-max-microvolt = <3300000>;
1263 gpio = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
1264 enable-active-high;
1265 };
1266};