Matthias Weisser | dcf0dca | 2010-08-09 13:31:51 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (c) 2010 Graf-Syteco, Matthias Weisser |
| 3 | * <weisserm@arcor.de> |
| 4 | * |
| 5 | * (C) Copyright 2007, mycable GmbH |
| 6 | * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <netdev.h> |
| 26 | #include <asm/io.h> |
| 27 | #include <asm/arch/mb86r0x.h> |
| 28 | |
| 29 | DECLARE_GLOBAL_DATA_PTR; |
| 30 | |
| 31 | /* |
| 32 | * Miscellaneous platform dependent initialisations |
| 33 | */ |
| 34 | int board_init(void) |
| 35 | { |
| 36 | struct mb86r0x_ccnt * ccnt = (struct mb86r0x_ccnt *) |
| 37 | MB86R0x_CCNT_BASE; |
| 38 | |
| 39 | /* We select mode 0 for group 2 and mode 1 for group 4 */ |
| 40 | writel(0x00000010, &ccnt->cmux_md); |
| 41 | |
| 42 | gd->flags = 0; |
| 43 | gd->bd->bi_arch_number = MACH_TYPE_JADECPU; |
| 44 | gd->bd->bi_boot_params = PHYS_SDRAM + PHYS_SDRAM_SIZE - 0x10000; |
| 45 | |
| 46 | icache_enable(); |
Matthias Weisser | 71a7b52 | 2011-06-29 02:08:07 +0000 | [diff] [blame] | 47 | dcache_enable(); |
Matthias Weisser | dcf0dca | 2010-08-09 13:31:51 +0200 | [diff] [blame] | 48 | |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | static void setup_display_power(uint32_t pwr_bit, char *pwm_opts, |
| 53 | unsigned long pwm_base) |
| 54 | { |
| 55 | struct mb86r0x_gpio *gpio = (struct mb86r0x_gpio *) |
| 56 | MB86R0x_GPIO_BASE; |
| 57 | struct mb86r0x_pwm *pwm = (struct mb86r0x_pwm *) pwm_base; |
| 58 | const char *e; |
| 59 | |
| 60 | writel(readl(&gpio->gpdr2) | pwr_bit, &gpio->gpdr2); |
| 61 | |
| 62 | e = getenv(pwm_opts); |
| 63 | if (e != NULL) { |
| 64 | const char *s; |
| 65 | uint32_t freq, init; |
| 66 | |
| 67 | freq = 0; |
| 68 | init = 0; |
| 69 | |
| 70 | s = strchr(e, 'f'); |
| 71 | if (s != NULL) |
| 72 | freq = simple_strtol(s + 2, NULL, 0); |
| 73 | |
| 74 | s = strchr(e, 'i'); |
| 75 | if (s != NULL) |
| 76 | init = simple_strtol(s + 2, NULL, 0); |
| 77 | |
| 78 | if (freq > 0) { |
| 79 | writel(CONFIG_MB86R0x_IOCLK / 1000 / freq, |
| 80 | &pwm->bcr); |
| 81 | writel(1002, &pwm->tpr); |
| 82 | writel(1, &pwm->pr); |
| 83 | writel(init * 10 + 1, &pwm->dr); |
| 84 | writel(1, &pwm->cr); |
| 85 | writel(1, &pwm->sr); |
| 86 | } |
| 87 | } |
| 88 | } |
| 89 | |
| 90 | int board_late_init(void) |
| 91 | { |
| 92 | struct mb86r0x_gpio *gpio = (struct mb86r0x_gpio *) |
| 93 | MB86R0x_GPIO_BASE; |
| 94 | uint32_t in_word; |
| 95 | |
| 96 | #ifdef CONFIG_VIDEO_MB86R0xGDC |
| 97 | /* Check if we have valid display settings and turn on power if so */ |
| 98 | /* Display 0 */ |
| 99 | if (getenv("gs_dsp_0_param") || getenv("videomode")) |
| 100 | setup_display_power((1 << 3), "gs_dsp_0_pwm", |
| 101 | MB86R0x_PWM0_BASE); |
| 102 | |
| 103 | /* The corresponding GPIO is always an output */ |
| 104 | writel(readl(&gpio->gpddr2) | (1 << 3), &gpio->gpddr2); |
| 105 | |
| 106 | /* Display 1 */ |
| 107 | if (getenv("gs_dsp_1_param") || getenv("videomode1")) |
| 108 | setup_display_power((1 << 4), "gs_dsp_1_pwm", |
| 109 | MB86R0x_PWM1_BASE); |
| 110 | |
| 111 | /* The corresponding GPIO is always an output */ |
| 112 | writel(readl(&gpio->gpddr2) | (1 << 4), &gpio->gpddr2); |
| 113 | #endif /* CONFIG_VIDEO_MB86R0xGDC */ |
| 114 | |
| 115 | /* 5V enable */ |
| 116 | writel(readl(&gpio->gpdr1) & ~(1 << 5), &gpio->gpdr1); |
| 117 | writel(readl(&gpio->gpddr1) | (1 << 5), &gpio->gpddr1); |
| 118 | |
| 119 | /* We have special boot options if told by GPIOs */ |
| 120 | in_word = readl(&gpio->gpdr1); |
| 121 | |
| 122 | if ((in_word & 0xC0) == 0xC0) { |
| 123 | setenv("stdin", "serial"); |
| 124 | setenv("stdout", "serial"); |
| 125 | setenv("stderr", "serial"); |
| 126 | setenv("preboot", "run gs_slow_boot"); |
| 127 | } else if ((in_word & 0xC0) != 0) { |
| 128 | setenv("stdout", "vga"); |
Matthias Weisser | dcf0dca | 2010-08-09 13:31:51 +0200 | [diff] [blame] | 129 | setenv("preboot", "run gs_slow_boot"); |
| 130 | } else { |
| 131 | setenv("stdin", "serial"); |
| 132 | setenv("stdout", "serial"); |
| 133 | setenv("stderr", "serial"); |
| 134 | if (getenv("gs_devel")) { |
| 135 | setenv("preboot", "run gs_slow_boot"); |
| 136 | } else { |
Matthias Weisser | dcf0dca | 2010-08-09 13:31:51 +0200 | [diff] [blame] | 137 | setenv("preboot", "run gs_fast_boot"); |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | return 0; |
| 142 | } |
| 143 | |
| 144 | int misc_init_r(void) |
| 145 | { |
| 146 | return 0; |
| 147 | } |
| 148 | |
| 149 | /* |
| 150 | * DRAM configuration |
| 151 | */ |
| 152 | int dram_init(void) |
| 153 | { |
Matthias Weisser | 4036dea | 2010-09-21 15:37:44 +0200 | [diff] [blame] | 154 | /* dram_init must store complete ramsize in gd->ram_size */ |
| 155 | gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM, |
| 156 | PHYS_SDRAM_SIZE); |
Matthias Weisser | dcf0dca | 2010-08-09 13:31:51 +0200 | [diff] [blame] | 157 | |
| 158 | return 0; |
| 159 | } |
| 160 | |
Matthias Weisser | 4036dea | 2010-09-21 15:37:44 +0200 | [diff] [blame] | 161 | void dram_init_banksize(void) |
| 162 | { |
| 163 | gd->bd->bi_dram[0].start = PHYS_SDRAM; |
| 164 | gd->bd->bi_dram[0].size = gd->ram_size; |
| 165 | } |
| 166 | |
Matthias Weisser | dcf0dca | 2010-08-09 13:31:51 +0200 | [diff] [blame] | 167 | int board_eth_init(bd_t *bis) |
| 168 | { |
| 169 | int rc = 0; |
| 170 | #ifdef CONFIG_SMC911X |
| 171 | rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); |
| 172 | #endif |
| 173 | return rc; |
| 174 | } |