blob: 4f77a3defb026843a468258faac8f1a9b010f262 [file] [log] [blame]
developerff9f2d42022-09-09 19:59:11 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2022 MediaTek Inc.
4 * Author: Sam Shih <sam.shih@mediatek.com>
5 */
6
7#include <init.h>
8#include <asm/armv8/mmu.h>
9#include <asm/system.h>
10#include <asm/global_data.h>
11
12DECLARE_GLOBAL_DATA_PTR;
13
14int dram_init(void)
15{
16 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, SZ_2G);
17
18 return 0;
19}
20
21void reset_cpu(ulong addr)
22{
23 psci_system_reset();
24}
25
26static struct mm_region mt7981_mem_map[] = {
27 {
28 /* DDR */
29 .virt = 0x40000000UL,
30 .phys = 0x40000000UL,
31 .size = 0x80000000UL,
32 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
33 }, {
34 .virt = 0x00000000UL,
35 .phys = 0x00000000UL,
36 .size = 0x40000000UL,
37 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
38 PTE_BLOCK_NON_SHARE |
39 PTE_BLOCK_PXN | PTE_BLOCK_UXN
40 }, {
41 0,
42 }
43};
44
45struct mm_region *mem_map = mt7981_mem_map;