| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set |
| 3 | # CONFIG_SPL_USE_ARCH_MEMSET is not set |
| 4 | CONFIG_ARCH_ROCKCHIP=y |
| 5 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 6 | CONFIG_ROCKCHIP_RK3188=y |
| Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 7 | CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y |
| Philipp Tomsich | fefc4ec | 2017-08-03 22:52:04 +0200 | [diff] [blame] | 8 | CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y |
| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 9 | CONFIG_TARGET_ROCK=y |
| 10 | CONFIG_SPL_STACK_R_ADDR=0x60080000 |
| 11 | CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" |
| Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 12 | CONFIG_DEBUG_UART=y |
| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 13 | # CONFIG_DISPLAY_CPUINFO is not set |
| 14 | CONFIG_SPL_STACK_R=y |
| 15 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 |
| Maxime Ripard | 2433644 | 2017-08-24 11:52:32 +0200 | [diff] [blame] | 16 | CONFIG_RANDOM_UUID=y |
| Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 17 | CONFIG_CMD_I2C=y |
| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 18 | CONFIG_CMD_MMC=y |
| 19 | CONFIG_CMD_SF=y |
| 20 | CONFIG_CMD_SPI=y |
| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 21 | # CONFIG_CMD_SETEXPR is not set |
| 22 | CONFIG_CMD_CACHE=y |
| 23 | CONFIG_CMD_TIME=y |
| 24 | CONFIG_CMD_REGULATOR=y |
| 25 | CONFIG_SPL_OF_CONTROL=y |
| 26 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 27 | CONFIG_SPL_OF_PLATDATA=y |
| Tom Rini | 5b0b040 | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 28 | CONFIG_ENV_IS_IN_MMC=y |
| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 29 | CONFIG_REGMAP=y |
| 30 | CONFIG_SYSCON=y |
| 31 | # CONFIG_SPL_SIMPLE_BUS is not set |
| 32 | CONFIG_CLK=y |
| 33 | CONFIG_ROCKCHIP_GPIO=y |
| 34 | CONFIG_SYS_I2C_ROCKCHIP=y |
| 35 | CONFIG_LED=y |
| 36 | CONFIG_MMC_DW=y |
| 37 | CONFIG_MMC_DW_ROCKCHIP=y |
| 38 | CONFIG_PINCTRL=y |
| Philipp Tomsich | a1dcf3c | 2017-04-19 16:46:37 +0200 | [diff] [blame] | 39 | CONFIG_PINCTRL_ROCKCHIP_RK3188=y |
| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 40 | CONFIG_DM_PMIC=y |
| 41 | # CONFIG_SPL_PMIC_CHILDREN is not set |
| 42 | CONFIG_PMIC_ACT8846=y |
| 43 | CONFIG_REGULATOR_ACT8846=y |
| 44 | CONFIG_DM_REGULATOR_FIXED=y |
| 45 | CONFIG_RAM=y |
| Alexandru Gagniuc | b1ab189 | 2017-03-27 12:54:19 -0700 | [diff] [blame] | 46 | # CONFIG_TPL_DM_SERIAL is not set |
| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 47 | CONFIG_DEBUG_UART_BASE=0x20064000 |
| 48 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 49 | CONFIG_DEBUG_UART_SHIFT=2 |
| 50 | CONFIG_SYS_NS16550=y |
| 51 | CONFIG_SYSRESET=y |
| 52 | CONFIG_SPL_TINY_MEMSET=y |
| Philipp Tomsich | fefc4ec | 2017-08-03 22:52:04 +0200 | [diff] [blame] | 53 | CONFIG_TPL_TINY_MEMSET=y |
| Heiko Stübner | e1de611 | 2017-03-26 21:09:55 +0200 | [diff] [blame] | 54 | CONFIG_CMD_DHRYSTONE=y |
| 55 | CONFIG_ERRNO_STR=y |