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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk38635852002-08-27 05:55:31 +00002/*
3 * (C) Copyright 2000
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenk38635852002-08-27 05:55:31 +00005 */
6
7/*
8 * Cache support: switch on or off, get status
9 */
10#include <common.h>
11#include <command.h>
Matthew McClintocka14695e2011-05-24 10:09:05 +000012#include <linux/compiler.h>
wdenk38635852002-08-27 05:55:31 +000013
Matthew McClintocka14695e2011-05-24 10:09:05 +000014static int parse_argv(const char *);
15
Stefan Kristianssona7416052011-10-31 18:21:12 +000016void __weak invalidate_icache_all(void)
Matthew McClintocka14695e2011-05-24 10:09:05 +000017{
Stefan Kristianssona7416052011-10-31 18:21:12 +000018 /* please define arch specific invalidate_icache_all */
19 puts("No arch specific invalidate_icache_all available!\n");
Matthew McClintocka14695e2011-05-24 10:09:05 +000020}
wdenk38635852002-08-27 05:55:31 +000021
Jeroen Hofsteef384fbf2014-06-23 00:22:08 +020022static int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk38635852002-08-27 05:55:31 +000023{
24 switch (argc) {
25 case 2: /* on / off */
Matthew McClintocka14695e2011-05-24 10:09:05 +000026 switch (parse_argv(argv[1])) {
Joe Hershberger3745b8c2012-10-03 10:56:16 +000027 case 0:
28 icache_disable();
wdenk38635852002-08-27 05:55:31 +000029 break;
Joe Hershberger3745b8c2012-10-03 10:56:16 +000030 case 1:
31 icache_enable();
wdenk38635852002-08-27 05:55:31 +000032 break;
Joe Hershberger3745b8c2012-10-03 10:56:16 +000033 case 2:
34 invalidate_icache_all();
Matthew McClintocka14695e2011-05-24 10:09:05 +000035 break;
wdenk38635852002-08-27 05:55:31 +000036 }
Joe Hershberger8cab1562012-10-03 10:56:17 +000037 break;
wdenk38635852002-08-27 05:55:31 +000038 case 1: /* get status */
Joe Hershberger3745b8c2012-10-03 10:56:16 +000039 printf("Instruction Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000040 icache_status() ? "ON" : "OFF");
41 return 0;
42 default:
Simon Glassa06dfc72011-12-10 08:44:01 +000043 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000044 }
45 return 0;
46}
47
Stefan Kristianssona7416052011-10-31 18:21:12 +000048void __weak flush_dcache_all(void)
Matthew McClintocka14695e2011-05-24 10:09:05 +000049{
Stefan Kristianssona7416052011-10-31 18:21:12 +000050 puts("No arch specific flush_dcache_all available!\n");
51 /* please define arch specific flush_dcache_all */
Matthew McClintocka14695e2011-05-24 10:09:05 +000052}
53
Jeroen Hofsteef384fbf2014-06-23 00:22:08 +020054static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk38635852002-08-27 05:55:31 +000055{
56 switch (argc) {
Joe Hershberger3745b8c2012-10-03 10:56:16 +000057 case 2: /* on / off */
Matthew McClintocka14695e2011-05-24 10:09:05 +000058 switch (parse_argv(argv[1])) {
Joe Hershberger3745b8c2012-10-03 10:56:16 +000059 case 0:
60 dcache_disable();
wdenk38635852002-08-27 05:55:31 +000061 break;
Joe Hershberger3745b8c2012-10-03 10:56:16 +000062 case 1:
63 dcache_enable();
wdenk38635852002-08-27 05:55:31 +000064 break;
Joe Hershberger3745b8c2012-10-03 10:56:16 +000065 case 2:
66 flush_dcache_all();
Matthew McClintocka14695e2011-05-24 10:09:05 +000067 break;
wdenk38635852002-08-27 05:55:31 +000068 }
Joe Hershberger3745b8c2012-10-03 10:56:16 +000069 break;
wdenk38635852002-08-27 05:55:31 +000070 case 1: /* get status */
Joe Hershberger3745b8c2012-10-03 10:56:16 +000071 printf("Data (writethrough) Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000072 dcache_status() ? "ON" : "OFF");
73 return 0;
74 default:
Simon Glassa06dfc72011-12-10 08:44:01 +000075 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000076 }
77 return 0;
wdenk38635852002-08-27 05:55:31 +000078}
79
Matthew McClintocka14695e2011-05-24 10:09:05 +000080static int parse_argv(const char *s)
wdenk38635852002-08-27 05:55:31 +000081{
Joe Hershberger3745b8c2012-10-03 10:56:16 +000082 if (strcmp(s, "flush") == 0)
83 return 2;
84 else if (strcmp(s, "on") == 0)
85 return 1;
86 else if (strcmp(s, "off") == 0)
87 return 0;
88
89 return -1;
wdenk38635852002-08-27 05:55:31 +000090}
91
wdenk57b2d802003-06-27 21:31:46 +000092
wdenkf287a242003-07-01 21:06:45 +000093U_BOOT_CMD(
94 icache, 2, 1, do_icache,
Peter Tyserdfb72b82009-01-27 18:03:12 -060095 "enable or disable instruction cache",
Matthew McClintocka14695e2011-05-24 10:09:05 +000096 "[on, off, flush]\n"
97 " - enable, disable, or flush instruction cache"
wdenk57b2d802003-06-27 21:31:46 +000098);
99
wdenkf287a242003-07-01 21:06:45 +0000100U_BOOT_CMD(
101 dcache, 2, 1, do_dcache,
Peter Tyserdfb72b82009-01-27 18:03:12 -0600102 "enable or disable data cache",
Matthew McClintocka14695e2011-05-24 10:09:05 +0000103 "[on, off, flush]\n"
104 " - enable, disable, or flush data (writethrough) cache"
wdenk57b2d802003-06-27 21:31:46 +0000105);