| Simon Glass | f542841 | 2015-01-26 20:29:37 -0700 | [diff] [blame] | 1 | U-Boot I2C |
| 2 | ---------- |
| 3 | |
| 4 | U-Boot's I2C model has the concept of an offset within a chip (I2C target |
| 5 | device). The offset can be up to 4 bytes long, but is normally 1 byte, |
| 6 | meaning that offsets from 0 to 255 are supported by the chip. This often |
| 7 | corresponds to register numbers. |
| 8 | |
| 9 | Apart from the controller-specific I2C bindings, U-Boot supports a special |
| 10 | property which allows the chip offset length to be selected. |
| 11 | |
| 12 | Optional properties: |
| 13 | - u-boot,i2c-offset-len - length of chip offset in bytes. If omitted the |
| 14 | default value of 1 is used. |
| Alexander Kochetkov | 84fe291 | 2018-03-27 17:52:26 +0300 | [diff] [blame] | 15 | - gpios = <sda ...>, <scl ...>; |
| 16 | pinctrl-names = "default", "gpio"; |
| 17 | pinctrl-0 = <&i2c_xfer>; |
| 18 | pinctrl-1 = <&i2c_gpio>; |
| 19 | Pin description for I2C bus software deblocking. |
| Simon Glass | f542841 | 2015-01-26 20:29:37 -0700 | [diff] [blame] | 20 | |
| 21 | |
| 22 | Example |
| 23 | ------- |
| 24 | |
| 25 | i2c4: i2c@12ca0000 { |
| 26 | cros-ec@1e { |
| 27 | reg = <0x1e>; |
| 28 | compatible = "google,cros-ec"; |
| 29 | i2c-max-frequency = <100000>; |
| 30 | u-boot,i2c-offset-len = <0>; |
| 31 | ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>; |
| 32 | }; |
| 33 | }; |
| Alexander Kochetkov | 84fe291 | 2018-03-27 17:52:26 +0300 | [diff] [blame] | 34 | |
| 35 | &i2c1 { |
| 36 | pinctrl-names = "default", "gpio"; |
| 37 | pinctrl-0 = <&i2c1_xfer>; |
| 38 | pinctrl-1 = <&i2c1_gpio>; |
| 39 | gpios = <&gpio1 26 GPIO_ACTIVE_LOW>, /* SDA */ |
| 40 | <&gpio1 27 GPIO_ACTIVE_LOW>; /* SCL */ |
| 41 | }; |