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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ilya Yanok37651282012-02-07 23:30:22 +00002/*
3 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
4 *
5 * Based on ti/evm/evm.c
Ilya Yanok37651282012-02-07 23:30:22 +00006 */
7
8#include <common.h>
9#include <asm/io.h>
10#include <asm/arch/mem.h>
11#include <asm/arch/mmc_host_def.h>
12#include <asm/arch/mux.h>
13#include <asm/arch/sys_proto.h>
14#include <asm/mach-types.h>
15#include <asm/gpio.h>
16#include <asm/omap_gpio.h>
Stefano Babic756a7bf2012-10-20 23:56:07 +000017#include <asm/arch/dss.h>
Lokesh Vutla61c517f2013-05-30 02:54:32 +000018#include <asm/arch/clock.h>
Masahiro Yamadaadae2ec2016-09-21 11:28:53 +090019#include <errno.h>
Ilya Yanok37651282012-02-07 23:30:22 +000020#include <i2c.h>
Tom Riniceed5d22017-05-12 22:33:27 -040021#ifdef CONFIG_USB_EHCI_HCD
Ilya Yanok37651282012-02-07 23:30:22 +000022#include <usb.h>
23#include <asm/ehci-omap.h>
24#endif
25#include "mcx.h"
26
27DECLARE_GLOBAL_DATA_PTR;
28
Stefano Babic72c72122012-10-16 04:07:04 +000029#define HOT_WATER_BUTTON 42
Stefano Babic756a7bf2012-10-20 23:56:07 +000030#define LCD_OUTPUT 55
31
32/* Address of the framebuffer in RAM. */
33#define FB_START_ADDRESS 0x88000000
Stefano Babic5b5d8042012-06-13 22:34:44 +000034
Tom Riniceed5d22017-05-12 22:33:27 -040035#ifdef CONFIG_USB_EHCI_HCD
Ilya Yanok37651282012-02-07 23:30:22 +000036static struct omap_usbhs_board_data usbhs_bdata = {
37 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
Stefano Babic72c72122012-10-16 04:07:04 +000038 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
Ilya Yanok37651282012-02-07 23:30:22 +000039 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
40};
41
Troy Kisky7d6bbb92013-10-10 15:27:57 -070042int ehci_hcd_init(int index, enum usb_init_type init,
43 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Ilya Yanok37651282012-02-07 23:30:22 +000044{
Mateusz Zalegad862f892013-10-04 19:22:26 +020045 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
Ilya Yanok37651282012-02-07 23:30:22 +000046}
47
Lucas Stach3494a4c2012-09-26 00:14:35 +020048int ehci_hcd_stop(int index)
Ilya Yanok37651282012-02-07 23:30:22 +000049{
50 return omap_ehci_hcd_stop();
51}
52#endif
53
54/*
55 * Routine: board_init
56 * Description: Early hardware init.
57 */
58int board_init(void)
59{
60 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
61 /* boot param addr */
62 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
63
Stefano Babic756a7bf2012-10-20 23:56:07 +000064 gpio_direction_output(LCD_OUTPUT, 0);
65
Stefano Babic5b5d8042012-06-13 22:34:44 +000066 return 0;
67}
68
69#ifdef CONFIG_BOARD_LATE_INIT
70int board_late_init(void)
71{
72 if (gpio_request(HOT_WATER_BUTTON, "hot-water-button") < 0) {
73 puts("Failed to get hot-water-button pin\n");
74 return -ENODEV;
75 }
76 gpio_direction_input(HOT_WATER_BUTTON);
77
78 /*
79 * if hot-water-button is pressed
80 * change bootcmd
81 */
82 if (gpio_get_value(HOT_WATER_BUTTON))
83 return 0;
84
Simon Glass6a38e412017-08-03 12:22:09 -060085 env_set("bootcmd", "run swupdate");
Stefano Babic72c72122012-10-16 04:07:04 +000086
Ilya Yanok37651282012-02-07 23:30:22 +000087 return 0;
88}
Stefano Babic5b5d8042012-06-13 22:34:44 +000089#endif
Ilya Yanok37651282012-02-07 23:30:22 +000090
91/*
Ilya Yanok37651282012-02-07 23:30:22 +000092 * Routine: set_muxconf_regs
93 * Description: Setting up the configuration Mux registers specific to the
94 * hardware. Many pins need to be moved from protect to primary
95 * mode.
96 */
97void set_muxconf_regs(void)
98{
99 MUX_MCX();
100}
101
Jean-Jacques Hiblote0e319a2017-02-01 11:39:14 +0100102#if defined(CONFIG_MMC_OMAP_HS)
Ilya Yanok37651282012-02-07 23:30:22 +0000103int board_mmc_init(bd_t *bis)
104{
Nikita Kiryanov4be9dbc2012-12-03 02:19:47 +0000105 return omap_mmc_init(0, 0, 0, -1, -1);
Ilya Yanok37651282012-02-07 23:30:22 +0000106}
107#endif
Stefano Babic756a7bf2012-10-20 23:56:07 +0000108
109#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
110
111static struct panel_config lcd_cfg = {
112 .timing_h = PANEL_TIMING_H(40, 40, 48),
113 .timing_v = PANEL_TIMING_V(29, 13, 3),
114 .pol_freq = 0x00003000, /* Pol Freq */
115 .divisor = 0x0001000E,
116 .panel_type = 0x01, /* TFT */
117 .data_lines = 0x03, /* 24 Bit RGB */
118 .load_mode = 0x02, /* Frame Mode */
119 .panel_color = 0,
120 .lcd_size = PANEL_LCD_SIZE(800, 480),
Nikita Kiryanov65bd0af2013-01-30 21:39:55 +0000121 .gfx_format = GFXFORMAT_RGB24_UNPACKED,
Stefano Babic756a7bf2012-10-20 23:56:07 +0000122};
123
124int board_video_init(void)
125{
126 struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
127 void *fb;
128
129 fb = (void *)FB_START_ADDRESS;
130
131 lcd_cfg.frame_buffer = fb;
132
133 setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
134 setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
135
136 omap3_dss_panel_config(&lcd_cfg);
137 omap3_dss_enable();
138
139 return 0;
140}
141#endif