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git01.mediatek.com / filogic / uboot / 2a46a0b320338e6266ceece572480c115ec9b0b6 / . / configs / blanche_defconfig
blob: a71c2a5ab3ff757ed201d0e5e8f7452009dcba5b [file] [log] [blame]
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +0900[diff] [blame]1CONFIG_ARM=y
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]2CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
Nobuhiro Iwamatsu5a9900f2016-05-31 04:28:11 +0900[diff] [blame]3CONFIG_ARCH_RMOBILE=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x00000000
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0x8000
Marek Vasutffb703d2018-05-02 11:42:22 +0200[diff] [blame]6CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche"
Marek Vasut8f9a8182018-01-07 19:37:06 +0100[diff] [blame]7CONFIG_R8A7792=y
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +0900[diff] [blame]8CONFIG_TARGET_BLANCHE=y
Marek Vasut5b16e012018-01-07 20:26:04 +0100[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot"
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]10CONFIG_FIT=y
11CONFIG_BOOTDELAY=3
Heiko Schocher20ea7ab2016-09-09 08:12:49 +0200[diff] [blame]12CONFIG_VERSION_VARIABLE=y
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]13CONFIG_HUSH_PARSER=y
Nobuhiro Iwamatsu5a9900f2016-05-31 04:28:11 +0900[diff] [blame]14CONFIG_CMD_BOOTZ=y
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +0900[diff] [blame]15# CONFIG_CMD_IMI is not set
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +0900[diff] [blame]16# CONFIG_CMD_XIMG is not set
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]17CONFIG_CMD_GPIO=y
18CONFIG_CMD_I2C=y
Nobuhiro Iwamatsu5a9900f2016-05-31 04:28:11 +0900[diff] [blame]19CONFIG_CMD_MMC=y
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]20CONFIG_CMD_PCI=y
Simon Glass6870d2e2017-08-04 16:34:45 -0600[diff] [blame]21CONFIG_CMD_SDRAM=y
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]22CONFIG_CMD_SF=y
23CONFIG_CMD_SPI=y
24CONFIG_CMD_USB=y
Nobuhiro Iwamatsu5a9900f2016-05-31 04:28:11 +0900[diff] [blame]25CONFIG_CMD_DHCP=y
26CONFIG_CMD_MII=y
27CONFIG_CMD_PING=y
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]28CONFIG_CMD_CACHE=y
29CONFIG_CMD_TIME=y
Nobuhiro Iwamatsu5a9900f2016-05-31 04:28:11 +0900[diff] [blame]30CONFIG_CMD_EXT2=y
31CONFIG_CMD_EXT4=y
32CONFIG_CMD_EXT4_WRITE=y
33CONFIG_CMD_FAT=y
Marek Vasut5b16e012018-01-07 20:26:04 +0100[diff] [blame]34CONFIG_OF_CONTROL=y
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]35CONFIG_OF_EMBED=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]36CONFIG_ENV_IS_IN_FLASH=y
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]37CONFIG_ENV_IS_IN_SPI_FLASH=y
38CONFIG_CLK=y
39CONFIG_CLK_RENESAS=y
40CONFIG_DM_GPIO=y
41CONFIG_RCAR_GPIO=y
42CONFIG_DM_I2C=y
43CONFIG_SYS_I2C_RCAR_IIC=y
44CONFIG_DM_MMC=y
45CONFIG_SH_MMCIF=y
46CONFIG_RENESAS_SDHI=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]47CONFIG_MTD_NOR_FLASH=y
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +0900[diff] [blame]48CONFIG_SPI_FLASH=y
49CONFIG_SPI_FLASH_BAR=y
50CONFIG_SPI_FLASH_SPANSION=y
Adam Ford0a044f82017-09-05 15:20:44 -0500[diff] [blame]51CONFIG_NETDEVICES=y
52CONFIG_SMC911X=y
53CONFIG_SMC911X_BASE=0x18000000
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]54CONFIG_PCI=y
55CONFIG_DM_PCI=y
56CONFIG_PCI_RCAR_GEN2=y
57CONFIG_PINCTRL=y
58CONFIG_PINCONF=y
59CONFIG_PINCTRL_PFC=y
60CONFIG_DM_REGULATOR=y
61CONFIG_DM_REGULATOR_FIXED=y
62CONFIG_DM_REGULATOR_GPIO=y
Marek Vasut2b2e4832017-07-21 23:18:46 +0200[diff] [blame]63CONFIG_SCIF_CONSOLE=y
Marek Vasut927b1e32018-04-30 14:10:36 +0200[diff] [blame]64CONFIG_SPI=y
65CONFIG_SH_QSPI=y
66CONFIG_USB=y
67CONFIG_DM_USB=y
68CONFIG_USB_EHCI_HCD=y
69CONFIG_USB_EHCI_PCI=y
70CONFIG_USB_STORAGE=y