Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (c) 2018 Macronix |
| 4 | * |
| 5 | * Author: Boris Brezillon <boris.brezillon@bootlin.com> |
| 6 | */ |
| 7 | |
| 8 | #ifndef __UBOOT__ |
| 9 | #include <linux/device.h> |
| 10 | #include <linux/kernel.h> |
| 11 | #endif |
Simon Glass | c06c1be | 2020-05-10 11:40:08 -0600 | [diff] [blame] | 12 | #include <linux/bug.h> |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 13 | #include <linux/mtd/spinand.h> |
| 14 | |
| 15 | #define SPINAND_MFR_MACRONIX 0xC2 |
Haolin Li | bd45aab | 2021-09-05 22:41:41 +0800 | [diff] [blame] | 16 | #define MACRONIX_ECCSR_MASK 0x0F |
| 17 | |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 18 | static SPINAND_OP_VARIANTS(read_cache_variants, |
| 19 | SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), |
| 20 | SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), |
| 21 | SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), |
| 22 | SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); |
| 23 | |
| 24 | static SPINAND_OP_VARIANTS(write_cache_variants, |
| 25 | SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), |
| 26 | SPINAND_PROG_LOAD(true, 0, NULL, 0)); |
| 27 | |
| 28 | static SPINAND_OP_VARIANTS(update_cache_variants, |
| 29 | SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), |
| 30 | SPINAND_PROG_LOAD(false, 0, NULL, 0)); |
| 31 | |
Miquel Raynal | 02b4979 | 2018-08-16 17:30:16 +0200 | [diff] [blame] | 32 | static int mx35lfxge4ab_ooblayout_ecc(struct mtd_info *mtd, int section, |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 33 | struct mtd_oob_region *region) |
| 34 | { |
| 35 | return -ERANGE; |
| 36 | } |
| 37 | |
Miquel Raynal | 02b4979 | 2018-08-16 17:30:16 +0200 | [diff] [blame] | 38 | static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section, |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 39 | struct mtd_oob_region *region) |
| 40 | { |
| 41 | if (section) |
| 42 | return -ERANGE; |
| 43 | |
| 44 | region->offset = 2; |
| 45 | region->length = mtd->oobsize - 2; |
| 46 | |
| 47 | return 0; |
| 48 | } |
| 49 | |
Miquel Raynal | 02b4979 | 2018-08-16 17:30:16 +0200 | [diff] [blame] | 50 | static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = { |
| 51 | .ecc = mx35lfxge4ab_ooblayout_ecc, |
Simon Glass | 62fd1a4 | 2020-02-03 07:35:56 -0700 | [diff] [blame] | 52 | .rfree = mx35lfxge4ab_ooblayout_free, |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 53 | }; |
| 54 | |
| 55 | static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr) |
| 56 | { |
| 57 | struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1), |
| 58 | SPI_MEM_OP_NO_ADDR, |
| 59 | SPI_MEM_OP_DUMMY(1, 1), |
| 60 | SPI_MEM_OP_DATA_IN(1, eccsr, 1)); |
| 61 | |
Haolin Li | bd45aab | 2021-09-05 22:41:41 +0800 | [diff] [blame] | 62 | int ret = spi_mem_exec_op(spinand->slave, &op); |
Haolin Li | bd45aab | 2021-09-05 22:41:41 +0800 | [diff] [blame] | 63 | if (ret) |
| 64 | return ret; |
| 65 | |
| 66 | *eccsr &= MACRONIX_ECCSR_MASK; |
| 67 | return 0; |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 68 | } |
| 69 | |
| 70 | static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand, |
| 71 | u8 status) |
| 72 | { |
| 73 | struct nand_device *nand = spinand_to_nand(spinand); |
| 74 | u8 eccsr; |
| 75 | |
| 76 | switch (status & STATUS_ECC_MASK) { |
| 77 | case STATUS_ECC_NO_BITFLIPS: |
| 78 | return 0; |
| 79 | |
| 80 | case STATUS_ECC_UNCOR_ERROR: |
| 81 | return -EBADMSG; |
| 82 | |
| 83 | case STATUS_ECC_HAS_BITFLIPS: |
| 84 | /* |
| 85 | * Let's try to retrieve the real maximum number of bitflips |
| 86 | * in order to avoid forcing the wear-leveling layer to move |
| 87 | * data around if it's not necessary. |
| 88 | */ |
| 89 | if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr)) |
| 90 | return nand->eccreq.strength; |
| 91 | |
| 92 | if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr)) |
| 93 | return nand->eccreq.strength; |
| 94 | |
| 95 | return eccsr; |
| 96 | |
| 97 | default: |
| 98 | break; |
| 99 | } |
| 100 | |
| 101 | return -EINVAL; |
| 102 | } |
| 103 | |
| 104 | static const struct spinand_info macronix_spinand_table[] = { |
Mikhail Kshevetskiy | 7201031 | 2023-01-10 12:58:38 +0100 | [diff] [blame] | 105 | SPINAND_INFO("MX35LF1GE4AB", |
| 106 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 107 | NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 108 | NAND_ECCREQ(4, 512), |
| 109 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 110 | &write_cache_variants, |
| 111 | &update_cache_variants), |
| 112 | SPINAND_HAS_QE_BIT, |
Miquel Raynal | 02b4979 | 2018-08-16 17:30:16 +0200 | [diff] [blame] | 113 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 114 | mx35lf1ge4ab_ecc_get_status)), |
Mikhail Kshevetskiy | 7201031 | 2023-01-10 12:58:38 +0100 | [diff] [blame] | 115 | SPINAND_INFO("MX35LF2GE4AB", |
| 116 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 117 | NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), |
Miquel Raynal | 02b4979 | 2018-08-16 17:30:16 +0200 | [diff] [blame] | 118 | NAND_ECCREQ(4, 512), |
| 119 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 120 | &write_cache_variants, |
| 121 | &update_cache_variants), |
| 122 | SPINAND_HAS_QE_BIT, |
| 123 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 124 | SPINAND_INFO("MX35LF2GE4AD", |
| 125 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x26), |
| 126 | NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), |
| 127 | NAND_ECCREQ(8, 512), |
| 128 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 129 | &write_cache_variants, |
| 130 | &update_cache_variants), |
| 131 | SPINAND_HAS_QE_BIT, |
| 132 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 133 | mx35lf1ge4ab_ecc_get_status)), |
| 134 | SPINAND_INFO("MX35LF4GE4AD", |
| 135 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x37), |
| 136 | NAND_MEMORG(1, 4096, 128, 64, 2048, 40, 1, 1, 1), |
| 137 | NAND_ECCREQ(8, 512), |
| 138 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 139 | &write_cache_variants, |
| 140 | &update_cache_variants), |
| 141 | SPINAND_HAS_QE_BIT, |
| 142 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 143 | mx35lf1ge4ab_ecc_get_status)), |
| 144 | SPINAND_INFO("MX35LF1G24AD", |
| 145 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x14), |
| 146 | NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
| 147 | NAND_ECCREQ(8, 512), |
| 148 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 149 | &write_cache_variants, |
| 150 | &update_cache_variants), |
| 151 | SPINAND_HAS_QE_BIT, |
| 152 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)), |
| 153 | SPINAND_INFO("MX35LF2G24AD", |
| 154 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24), |
| 155 | NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), |
| 156 | NAND_ECCREQ(8, 512), |
| 157 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 158 | &write_cache_variants, |
| 159 | &update_cache_variants), |
| 160 | SPINAND_HAS_QE_BIT, |
| 161 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)), |
| 162 | SPINAND_INFO("MX35LF4G24AD", |
| 163 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35), |
| 164 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 2, 1, 1), |
| 165 | NAND_ECCREQ(8, 512), |
| 166 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 167 | &write_cache_variants, |
| 168 | &update_cache_variants), |
| 169 | SPINAND_HAS_QE_BIT, |
| 170 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)), |
| 171 | SPINAND_INFO("MX31LF1GE4BC", |
| 172 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e), |
| 173 | NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), |
| 174 | NAND_ECCREQ(8, 512), |
| 175 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 176 | &write_cache_variants, |
| 177 | &update_cache_variants), |
| 178 | SPINAND_HAS_QE_BIT, |
| 179 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 180 | mx35lf1ge4ab_ecc_get_status)), |
| 181 | SPINAND_INFO("MX31UF1GE4BC", |
| 182 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x9e), |
| 183 | NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), |
| 184 | NAND_ECCREQ(8, 512), |
| 185 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 186 | &write_cache_variants, |
| 187 | &update_cache_variants), |
| 188 | SPINAND_HAS_QE_BIT, |
| 189 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 190 | mx35lf1ge4ab_ecc_get_status)), |
| 191 | |
| 192 | SPINAND_INFO("MX35LF2G14AC", |
| 193 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x20), |
| 194 | NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), |
| 195 | NAND_ECCREQ(4, 512), |
| 196 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 197 | &write_cache_variants, |
| 198 | &update_cache_variants), |
| 199 | SPINAND_HAS_QE_BIT, |
| 200 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 201 | mx35lf1ge4ab_ecc_get_status)), |
| 202 | SPINAND_INFO("MX35UF4G24AD", |
| 203 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb5), |
| 204 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 2, 1, 1), |
| 205 | NAND_ECCREQ(8, 512), |
| 206 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 207 | &write_cache_variants, |
| 208 | &update_cache_variants), |
| 209 | SPINAND_HAS_QE_BIT, |
| 210 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 211 | mx35lf1ge4ab_ecc_get_status)), |
Mikhail Kshevetskiy | 7201031 | 2023-01-10 12:58:38 +0100 | [diff] [blame] | 212 | SPINAND_INFO("MX35UF4GE4AD", |
| 213 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb7), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 214 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
Jaime Liao | 4b017b9 | 2021-06-07 16:19:15 +0800 | [diff] [blame] | 215 | NAND_ECCREQ(8, 512), |
| 216 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 217 | &write_cache_variants, |
| 218 | &update_cache_variants), |
| 219 | SPINAND_HAS_QE_BIT, |
| 220 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 221 | mx35lf1ge4ab_ecc_get_status)), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 222 | SPINAND_INFO("MX35UF2G14AC", |
| 223 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa0), |
| 224 | NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), |
| 225 | NAND_ECCREQ(4, 512), |
| 226 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 227 | &write_cache_variants, |
| 228 | &update_cache_variants), |
| 229 | SPINAND_HAS_QE_BIT, |
| 230 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 231 | mx35lf1ge4ab_ecc_get_status)), |
| 232 | SPINAND_INFO("MX35UF2G24AD", |
| 233 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa4), |
| 234 | NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), |
| 235 | NAND_ECCREQ(8, 512), |
| 236 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 237 | &write_cache_variants, |
| 238 | &update_cache_variants), |
| 239 | SPINAND_HAS_QE_BIT, |
| 240 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 241 | mx35lf1ge4ab_ecc_get_status)), |
Mikhail Kshevetskiy | 7201031 | 2023-01-10 12:58:38 +0100 | [diff] [blame] | 242 | SPINAND_INFO("MX35UF2GE4AD", |
| 243 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa6), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 244 | NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), |
Jaime Liao | 4b017b9 | 2021-06-07 16:19:15 +0800 | [diff] [blame] | 245 | NAND_ECCREQ(8, 512), |
| 246 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 247 | &write_cache_variants, |
| 248 | &update_cache_variants), |
| 249 | SPINAND_HAS_QE_BIT, |
| 250 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 251 | mx35lf1ge4ab_ecc_get_status)), |
Mikhail Kshevetskiy | 7201031 | 2023-01-10 12:58:38 +0100 | [diff] [blame] | 252 | SPINAND_INFO("MX35UF2GE4AC", |
| 253 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa2), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 254 | NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), |
| 255 | NAND_ECCREQ(4, 512), |
| 256 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 257 | &write_cache_variants, |
| 258 | &update_cache_variants), |
| 259 | SPINAND_HAS_QE_BIT, |
| 260 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 261 | mx35lf1ge4ab_ecc_get_status)), |
| 262 | SPINAND_INFO("MX35UF1G14AC", |
| 263 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x90), |
| 264 | NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), |
Jaime Liao | 4b017b9 | 2021-06-07 16:19:15 +0800 | [diff] [blame] | 265 | NAND_ECCREQ(4, 512), |
| 266 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 267 | &write_cache_variants, |
| 268 | &update_cache_variants), |
| 269 | SPINAND_HAS_QE_BIT, |
| 270 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 271 | mx35lf1ge4ab_ecc_get_status)), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 272 | SPINAND_INFO("MX35UF1G24AD", |
| 273 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x94), |
| 274 | NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
| 275 | NAND_ECCREQ(8, 512), |
| 276 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 277 | &write_cache_variants, |
| 278 | &update_cache_variants), |
| 279 | SPINAND_HAS_QE_BIT, |
| 280 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 281 | mx35lf1ge4ab_ecc_get_status)), |
Mikhail Kshevetskiy | 7201031 | 2023-01-10 12:58:38 +0100 | [diff] [blame] | 282 | SPINAND_INFO("MX35UF1GE4AD", |
| 283 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x96), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 284 | NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
Jaime Liao | 4b017b9 | 2021-06-07 16:19:15 +0800 | [diff] [blame] | 285 | NAND_ECCREQ(8, 512), |
| 286 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 287 | &write_cache_variants, |
| 288 | &update_cache_variants), |
| 289 | SPINAND_HAS_QE_BIT, |
| 290 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 291 | mx35lf1ge4ab_ecc_get_status)), |
Mikhail Kshevetskiy | 7201031 | 2023-01-10 12:58:38 +0100 | [diff] [blame] | 292 | SPINAND_INFO("MX35UF1GE4AC", |
| 293 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x92), |
Mikhail Kshevetskiy | 2a1e78b | 2023-01-10 12:58:40 +0100 | [diff] [blame^] | 294 | NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), |
Jaime Liao | 4b017b9 | 2021-06-07 16:19:15 +0800 | [diff] [blame] | 295 | NAND_ECCREQ(4, 512), |
| 296 | SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 297 | &write_cache_variants, |
| 298 | &update_cache_variants), |
| 299 | SPINAND_HAS_QE_BIT, |
| 300 | SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, |
| 301 | mx35lf1ge4ab_ecc_get_status)), |
| 302 | |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 303 | }; |
| 304 | |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 305 | static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = { |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 306 | }; |
| 307 | |
| 308 | const struct spinand_manufacturer macronix_spinand_manufacturer = { |
| 309 | .id = SPINAND_MFR_MACRONIX, |
| 310 | .name = "Macronix", |
Mikhail Kshevetskiy | 7201031 | 2023-01-10 12:58:38 +0100 | [diff] [blame] | 311 | .chips = macronix_spinand_table, |
| 312 | .nchips = ARRAY_SIZE(macronix_spinand_table), |
Boris Brezillon | fa46525 | 2018-08-16 17:30:15 +0200 | [diff] [blame] | 313 | .ops = ¯onix_spinand_manuf_ops, |
| 314 | }; |