blob: f5cbbf345c56da83943eabf8ab3e5250312f7b68 [file] [log] [blame]
Marek Vasut78687b72011-11-08 23:18:20 +00001/*
2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3 * on behalf of DENX Software Engineering GmbH
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
Otavio Salvadorbbcf3bf2012-05-12 13:40:15 +000020#ifndef __M28EVK_CONFIG_H__
21#define __M28EVK_CONFIG_H__
Marek Vasut78687b72011-11-08 23:18:20 +000022
23#include <asm/arch/regs-base.h>
24
25/*
26 * SoC configurations
27 */
28#define CONFIG_MX28 /* i.MX28 SoC */
29#define CONFIG_MXS_GPIO /* GPIO control */
30#define CONFIG_SYS_HZ 1000 /* Ticks per second */
31
32/*
33 * Define M28EVK machine type by hand until it lands in mach-types
34 */
35#define MACH_TYPE_M28EVK 3613
36
37#define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
38
39#define CONFIG_SYS_NO_FLASH
40#define CONFIG_SYS_ICACHE_OFF
41#define CONFIG_SYS_DCACHE_OFF
42#define CONFIG_BOARD_EARLY_INIT_F
Marek Vasut5bf48fb2011-11-08 23:18:23 +000043#define CONFIG_ARCH_MISC_INIT
Marek Vasut78687b72011-11-08 23:18:20 +000044
45/*
Marek Vasut926227e2011-11-08 23:18:21 +000046 * SPL
47 */
48#define CONFIG_SPL
49#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
Otavio Salvador29c70a82012-08-05 09:05:29 +000050#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
51#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
Marek Vasutda6c5d52011-12-08 09:46:12 +000052#define CONFIG_SPL_LIBCOMMON_SUPPORT
53#define CONFIG_SPL_LIBGENERIC_SUPPORT
Marek Vasutb28fe462012-05-01 11:09:45 +000054#define CONFIG_SPL_GPIO_SUPPORT
Marek Vasut926227e2011-11-08 23:18:21 +000055
56/*
Marek Vasut78687b72011-11-08 23:18:20 +000057 * U-Boot Commands
58 */
59#include <config_cmd_default.h>
60#define CONFIG_DISPLAY_CPUINFO
61#define CONFIG_DOS_PARTITION
62
63#define CONFIG_CMD_CACHE
64#define CONFIG_CMD_DATE
65#define CONFIG_CMD_DHCP
66#define CONFIG_CMD_EEPROM
67#define CONFIG_CMD_EXT2
68#define CONFIG_CMD_FAT
69#define CONFIG_CMD_GPIO
70#define CONFIG_CMD_I2C
71#define CONFIG_CMD_MII
72#define CONFIG_CMD_MMC
73#define CONFIG_CMD_NAND
74#define CONFIG_CMD_NET
75#define CONFIG_CMD_NFS
76#define CONFIG_CMD_PING
77#define CONFIG_CMD_SETEXPR
78#define CONFIG_CMD_SF
79#define CONFIG_CMD_SPI
Marek Vasutbf4362f2011-11-08 23:18:27 +000080#define CONFIG_CMD_USB
Marek Vasut78687b72011-11-08 23:18:20 +000081
82/*
83 * Memory configurations
84 */
Fabio Estevama064cf82011-11-10 06:38:45 +000085#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
Marek Vasut78687b72011-11-08 23:18:20 +000086#define PHYS_SDRAM_1 0x40000000 /* Base address */
Marek Vasute63c1fe2012-05-03 05:47:19 +000087#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
Otavio Salvador5136de62012-05-12 13:40:11 +000088#define CONFIG_STACKSIZE (128 * 1024) /* 128 KB stack */
Marek Vasut78687b72011-11-08 23:18:20 +000089#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
90#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
91#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
92#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
93#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
94/* Point initial SP in SRAM so SPL can use it too. */
Fabio Estevam7c88c642011-12-29 03:35:38 +000095
Marek Vasutce696722012-04-01 18:21:34 +000096#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
Fabio Estevam7c88c642011-12-29 03:35:38 +000097#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
98
99#define CONFIG_SYS_INIT_SP_OFFSET \
100 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
101#define CONFIG_SYS_INIT_SP_ADDR \
102 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
Marek Vasut78687b72011-11-08 23:18:20 +0000103/*
104 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
105 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
106 * binary. In case there was more of this mess, 0x100 bytes are skipped.
107 */
108#define CONFIG_SYS_TEXT_BASE 0x40000100
109
110/*
111 * U-Boot general configurations
112 */
113#define CONFIG_SYS_LONGHELP
114#define CONFIG_SYS_PROMPT "=> "
115#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
116#define CONFIG_SYS_PBSIZE \
117 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
118 /* Print buffer size */
119#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
120#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
121 /* Boot argument buffer size */
122#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
123#define CONFIG_AUTO_COMPLETE /* Command auto complete */
124#define CONFIG_CMDLINE_EDITING /* Command history etc */
125#define CONFIG_SYS_HUSH_PARSER
Marek Vasut78687b72011-11-08 23:18:20 +0000126
127/*
128 * Serial Driver
129 */
130#define CONFIG_PL011_SERIAL
131#define CONFIG_PL011_CLOCK 24000000
132#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
133#define CONFIG_CONS_INDEX 0
134#define CONFIG_BAUDRATE 115200 /* Default baud rate */
Marek Vasut78687b72011-11-08 23:18:20 +0000135
136/*
137 * MMC Driver
138 */
139#ifdef CONFIG_CMD_MMC
140#define CONFIG_MMC
Marek Vasut6e48cf32012-03-15 18:33:22 +0000141#define CONFIG_MMC_BOUNCE_BUFFER
Marek Vasut78687b72011-11-08 23:18:20 +0000142#define CONFIG_GENERIC_MMC
143#define CONFIG_MXS_MMC
144#endif
145
146/*
Marek Vasut20a23bc2012-04-08 17:09:06 +0000147 * APBH DMA
148 */
149#define CONFIG_APBH_DMA
150
151/*
Marek Vasut78687b72011-11-08 23:18:20 +0000152 * NAND
153 */
Marek Vasut173825c2011-12-31 18:28:22 +0000154#define CONFIG_ENV_SIZE (16 * 1024)
Marek Vasut78687b72011-11-08 23:18:20 +0000155#ifdef CONFIG_CMD_NAND
156#define CONFIG_NAND_MXS
Marek Vasut78687b72011-11-08 23:18:20 +0000157#define CONFIG_SYS_MAX_NAND_DEVICE 1
158#define CONFIG_SYS_NAND_BASE 0x60000000
159#define CONFIG_SYS_NAND_5_ADDR_CYCLE
Marek Vasut78687b72011-11-08 23:18:20 +0000160
161/* Environment is in NAND */
162#define CONFIG_ENV_IS_IN_NAND
Marek Vasut78687b72011-11-08 23:18:20 +0000163#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
164#define CONFIG_ENV_SECT_SIZE (128 * 1024)
165#define CONFIG_ENV_RANGE (512 * 1024)
166#define CONFIG_ENV_OFFSET 0x300000
167#define CONFIG_ENV_OFFSET_REDUND \
168 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
169
170#define CONFIG_CMD_UBI
171#define CONFIG_CMD_UBIFS
172#define CONFIG_CMD_MTDPARTS
173#define CONFIG_RBTREE
174#define CONFIG_LZO
175#define CONFIG_MTD_DEVICE
176#define CONFIG_MTD_PARTITIONS
177#define MTDIDS_DEFAULT "nand0=gpmi-nand.0"
178#define MTDPARTS_DEFAULT \
179 "mtdparts=gpmi-nand.0:" \
180 "3m(bootloader)ro," \
181 "512k(environment)," \
182 "512k(redundant-environment)," \
183 "4m(kernel)," \
184 "-(filesystem)"
Marek Vasut173825c2011-12-31 18:28:22 +0000185#else
186#define CONFIG_ENV_IS_NOWHERE
Marek Vasut78687b72011-11-08 23:18:20 +0000187#endif
188
189/*
190 * Ethernet on SOC (FEC)
191 */
192#ifdef CONFIG_CMD_NET
Marek Vasut78687b72011-11-08 23:18:20 +0000193#define CONFIG_ETHPRIME "FEC0"
194#define CONFIG_FEC_MXC
195#define CONFIG_FEC_MXC_MULTI
196#define CONFIG_MII
Marek Vasut78687b72011-11-08 23:18:20 +0000197#define CONFIG_FEC_XCV_TYPE RMII
198#endif
199
200/*
201 * I2C
202 */
203#ifdef CONFIG_CMD_I2C
204#define CONFIG_I2C_MXS
205#define CONFIG_HARD_I2C
206#define CONFIG_SYS_I2C_SPEED 400000
207#endif
208
209/*
210 * EEPROM
211 */
212#ifdef CONFIG_CMD_EEPROM
213#define CONFIG_SYS_I2C_MULTI_EEPROMS
214#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
215#endif
216
217/*
218 * RTC
219 */
220#ifdef CONFIG_CMD_DATE
221/* Use the internal RTC in the MXS chip */
222#define CONFIG_RTC_INTERNAL
223#ifdef CONFIG_RTC_INTERNAL
224#define CONFIG_RTC_MXS
225#else
226#define CONFIG_RTC_M41T62
227#define CONFIG_SYS_I2C_RTC_ADDR 0x68
228#define CONFIG_SYS_M41T11_BASE_YEAR 2000
229#endif
230#endif
231
232/*
Marek Vasutbf4362f2011-11-08 23:18:27 +0000233 * USB
234 */
235#ifdef CONFIG_CMD_USB
236#define CONFIG_USB_EHCI
237#define CONFIG_USB_EHCI_MXS
238#define CONFIG_EHCI_MXS_PORT 1
239#define CONFIG_EHCI_IS_TDI
240#define CONFIG_USB_STORAGE
241#endif
242
243/*
Marek Vasut78687b72011-11-08 23:18:20 +0000244 * SPI
245 */
246#ifdef CONFIG_CMD_SPI
247#define CONFIG_HARD_SPI
248#define CONFIG_MXS_SPI
249#define CONFIG_SPI_HALF_DUPLEX
250#define CONFIG_DEFAULT_SPI_BUS 2
251#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
252
253/* SPI FLASH */
254#ifdef CONFIG_CMD_SF
255#define CONFIG_SPI_FLASH
256#define CONFIG_SPI_FLASH_STMICRO
Fabio Estevam608e9092012-03-22 14:29:04 +0000257#define CONFIG_SF_DEFAULT_CS 2
Marek Vasut78687b72011-11-08 23:18:20 +0000258#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
259#define CONFIG_SF_DEFAULT_SPEED 24000000
260
261#define CONFIG_ENV_SPI_CS 0
262#define CONFIG_ENV_SPI_BUS 2
263#define CONFIG_ENV_SPI_MAX_HZ 24000000
264#define CONFIG_ENV_SPI_MODE SPI_MODE_0
265#endif
266#endif
267
268/*
269 * Boot Linux
270 */
271#define CONFIG_CMDLINE_TAG
272#define CONFIG_SETUP_MEMORY_TAGS
273#define CONFIG_BOOTDELAY 3
274#define CONFIG_BOOTFILE "uImage"
275#define CONFIG_BOOTARGS "console=ttyAM0,115200n8 "
276#define CONFIG_BOOTCOMMAND "run bootcmd_net"
277#define CONFIG_LOADADDR 0x42000000
278#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Fabio Estevamf4fabf22012-04-23 06:06:29 +0000279#define CONFIG_OF_LIBFDT
Marek Vasut78687b72011-11-08 23:18:20 +0000280
281/*
282 * Extra Environments
283 */
284#define CONFIG_EXTRA_ENV_SETTINGS \
285 "update_nand_full_filename=u-boot.nand\0" \
286 "update_nand_firmware_filename=u-boot.sb\0" \
Marek Vasutf5013862012-05-01 11:09:43 +0000287 "update_sd_firmware_filename=u-boot.sd\0" \
Marek Vasut78687b72011-11-08 23:18:20 +0000288 "update_nand_firmware_maxsz=0x100000\0" \
289 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
290 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
291 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
292 "nand device 0 ; " \
293 "nand info ; " \
294 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
295 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
296 "update_nand_full=" /* Update FCB, DBBT and FW */ \
297 "if tftp ${update_nand_full_filename} ; then " \
298 "run update_nand_get_fcb_size ; " \
299 "nand scrub -y 0x0 ${filesize} ; " \
300 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \
301 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
302 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
303 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
304 "fi\0" \
305 "update_nand_firmware=" /* Update only firmware */ \
306 "if tftp ${update_nand_firmware_filename} ; then " \
307 "run update_nand_get_fcb_size ; " \
308 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
309 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
310 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
311 "nand erase ${fcb_sz} ${fw_sz} ; " \
312 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
313 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
Marek Vasutf5013862012-05-01 11:09:43 +0000314 "fi\0" \
315 "update_sd_firmware=" /* Update the SD firmware partition */ \
316 "if mmc rescan ; then " \
317 "if tftp ${update_sd_firmware_filename} ; then " \
318 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
319 "setexpr fw_sz ${fw_sz} + 1 ; " \
320 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
321 "fi ; " \
Marek Vasut78687b72011-11-08 23:18:20 +0000322 "fi\0"
323
Otavio Salvadorbbcf3bf2012-05-12 13:40:15 +0000324#endif /* __M28EVK_CONFIG_H__ */