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Liviu Dudauba024e62018-09-17 17:50:00 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Arm Ltd
4 * Author: Liviu Dudau <liviu.dudau@foss.arm.com>
5 *
6 */
7#define DEBUG
Tom Riniabb9a042024-05-18 20:20:43 -06008#include <common.h>
Liviu Dudauba024e62018-09-17 17:50:00 +01009#include <clk-uclass.h>
10#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -060011#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070012#include <dm/device_compat.h>
Liviu Dudauba024e62018-09-17 17:50:00 +010013#include <dm/lists.h>
14#include <errno.h>
15#include <misc.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060016#include <linux/bitops.h>
Liviu Dudauba024e62018-09-17 17:50:00 +010017
18#define CLK_FUNCTION BIT(20)
19
20struct vexpress_osc_clk_priv {
21 u8 osc;
22 ulong rate_min;
23 ulong rate_max;
24};
25
26static ulong vexpress_osc_clk_get_rate(struct clk *clk)
27{
28 int err;
29 u32 data;
30 struct udevice *vexpress_cfg = dev_get_parent(clk->dev);
31 struct vexpress_osc_clk_priv *priv = dev_get_priv(clk->dev);
32
33 data = CLK_FUNCTION | priv->osc;
34 err = misc_read(vexpress_cfg, 0, &data, sizeof(data));
Simon Glass587dc402018-11-06 15:21:39 -070035 if (err < 0)
Liviu Dudauba024e62018-09-17 17:50:00 +010036 return err;
37
38 return data;
39}
40
41#ifndef CONFIG_SPL_BUILD
42static ulong vexpress_osc_clk_set_rate(struct clk *clk, ulong rate)
43{
44 int err;
45 u32 buffer[2];
46 struct udevice *vexpress_cfg = dev_get_parent(clk->dev);
47 struct vexpress_osc_clk_priv *priv = dev_get_priv(clk->dev);
48
49 if (rate < priv->rate_min || rate > priv->rate_max)
50 return -EINVAL;
51
52 /*
53 * we are sending the parent the info about the oscillator
54 * and the value we want to set
55 */
56 buffer[0] = CLK_FUNCTION | priv->osc;
57 buffer[1] = rate;
58 err = misc_write(vexpress_cfg, 0, buffer, 2 * sizeof(u32));
Simon Glass587dc402018-11-06 15:21:39 -070059 if (err < 0)
Liviu Dudauba024e62018-09-17 17:50:00 +010060 return err;
61
62 return rate;
63}
64#endif
65
66static struct clk_ops vexpress_osc_clk_ops = {
67 .get_rate = vexpress_osc_clk_get_rate,
68#ifndef CONFIG_SPL_BUILD
69 .set_rate = vexpress_osc_clk_set_rate,
70#endif
71};
72
73static int vexpress_osc_clk_probe(struct udevice *dev)
74{
75 struct vexpress_osc_clk_priv *priv = dev_get_priv(dev);
76 u32 values[2];
77 int err;
78
79 err = dev_read_u32_array(dev, "freq-range", values, 2);
80 if (err)
81 return err;
82 priv->rate_min = values[0];
83 priv->rate_max = values[1];
84
85 err = dev_read_u32_array(dev, "arm,vexpress-sysreg,func", values, 2);
86 if (err)
87 return err;
88
89 if (values[0] != 1) {
90 dev_err(dev, "Invalid VExpress function for clock, must be '1'");
91 return -EINVAL;
92 }
93 priv->osc = values[1];
94 debug("clk \"%s%d\", min freq %luHz, max freq %luHz\n", dev->name,
95 priv->osc, priv->rate_min, priv->rate_max);
96
97 return 0;
98}
99
100static const struct udevice_id vexpress_osc_clk_ids[] = {
101 { .compatible = "arm,vexpress-osc", },
102 {}
103};
104
105U_BOOT_DRIVER(vexpress_osc_clk) = {
106 .name = "vexpress_osc_clk",
107 .id = UCLASS_CLK,
108 .of_match = vexpress_osc_clk_ids,
109 .ops = &vexpress_osc_clk_ops,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700110 .priv_auto = sizeof(struct vexpress_osc_clk_priv),
Liviu Dudauba024e62018-09-17 17:50:00 +0100111 .probe = vexpress_osc_clk_probe,
112};