Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Gateworks Corporation |
Ye Li | cf63923 | 2020-05-04 22:08:55 +0800 | [diff] [blame] | 4 | * Copyright 2019 NXP |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 5 | * Author: Tim Harvey <tharvey@gateworks.com> |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 6 | */ |
| 7 | #include <common.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 8 | #include <log.h> |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 9 | #include <nand.h> |
| 10 | #include <malloc.h> |
Shyam Saini | f63ef49 | 2019-06-14 13:05:33 +0530 | [diff] [blame] | 11 | #include <mxs_nand.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 12 | #include <asm/cache.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 13 | #include <linux/bitops.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 14 | #include <linux/delay.h> |
Simon Glass | d66c5f7 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 15 | #include <linux/err.h> |
Tom Rini | 3bde7e2 | 2021-09-22 14:50:35 -0400 | [diff] [blame] | 16 | #include <linux/mtd/rawnand.h> |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 17 | |
Scott Wood | 2c1b7e1 | 2016-05-30 13:57:55 -0500 | [diff] [blame] | 18 | static struct mtd_info *mtd; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 19 | static struct nand_chip nand_chip; |
| 20 | |
| 21 | static void mxs_nand_command(struct mtd_info *mtd, unsigned int command, |
| 22 | int column, int page_addr) |
| 23 | { |
Scott Wood | 17fed14 | 2016-05-30 13:57:56 -0500 | [diff] [blame] | 24 | register struct nand_chip *chip = mtd_to_nand(mtd); |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 25 | u32 timeo, time_start; |
| 26 | |
| 27 | /* write out the command to the device */ |
| 28 | chip->cmd_ctrl(mtd, command, NAND_CLE); |
| 29 | |
| 30 | /* Serially input address */ |
| 31 | if (column != -1) { |
Andrea Scian | d2f7d07 | 2022-06-21 22:05:10 +0200 | [diff] [blame] | 32 | /* Adjust columns for 16 bit buswidth */ |
| 33 | if (chip->options & NAND_BUSWIDTH_16 && |
| 34 | !nand_opcode_8bits(command)) |
| 35 | column >>= 1; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 36 | chip->cmd_ctrl(mtd, column, NAND_ALE); |
Andrea Scian | d2f7d07 | 2022-06-21 22:05:10 +0200 | [diff] [blame] | 37 | |
| 38 | /* |
| 39 | * Assume LP NAND here, so use two bytes column address |
| 40 | * but not for CMD_READID and CMD_PARAM, which require |
| 41 | * only one byte column address |
| 42 | */ |
| 43 | if (command != NAND_CMD_READID && |
| 44 | command != NAND_CMD_PARAM) |
| 45 | chip->cmd_ctrl(mtd, column >> 8, NAND_ALE); |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 46 | } |
| 47 | if (page_addr != -1) { |
| 48 | chip->cmd_ctrl(mtd, page_addr, NAND_ALE); |
| 49 | chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE); |
| 50 | /* One more address cycle for devices > 128MiB */ |
| 51 | if (chip->chipsize > (128 << 20)) |
| 52 | chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE); |
| 53 | } |
| 54 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0); |
| 55 | |
| 56 | if (command == NAND_CMD_READ0) { |
| 57 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE); |
| 58 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0); |
Ye Li | cf63923 | 2020-05-04 22:08:55 +0800 | [diff] [blame] | 59 | } else if (command == NAND_CMD_RNDOUT) { |
| 60 | /* No ready / busy check necessary */ |
| 61 | chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, |
| 62 | NAND_NCE | NAND_CLE); |
| 63 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 64 | NAND_NCE); |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | /* wait for nand ready */ |
| 68 | ndelay(100); |
| 69 | timeo = (CONFIG_SYS_HZ * 20) / 1000; |
| 70 | time_start = get_timer(0); |
| 71 | while (get_timer(time_start) < timeo) { |
| 72 | if (chip->dev_ready(mtd)) |
| 73 | break; |
| 74 | } |
| 75 | } |
| 76 | |
Jörg Krause | 7440e4b | 2018-01-14 19:26:40 +0100 | [diff] [blame] | 77 | #if defined (CONFIG_SPL_NAND_IDENT) |
| 78 | |
| 79 | /* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */ |
| 80 | static int mxs_flash_full_ident(struct mtd_info *mtd) |
| 81 | { |
| 82 | int nand_maf_id, nand_dev_id; |
| 83 | struct nand_chip *chip = mtd_to_nand(mtd); |
Michael Trimarchi | 4d4862d9 | 2022-07-25 10:06:06 +0200 | [diff] [blame] | 84 | int ret; |
Jörg Krause | 7440e4b | 2018-01-14 19:26:40 +0100 | [diff] [blame] | 85 | |
Michael Trimarchi | f20a6f0 | 2022-07-25 10:18:51 +0200 | [diff] [blame] | 86 | ret = nand_detect(chip, &nand_maf_id, &nand_dev_id, NULL); |
Jörg Krause | 7440e4b | 2018-01-14 19:26:40 +0100 | [diff] [blame] | 87 | |
Michael Trimarchi | 4d4862d9 | 2022-07-25 10:06:06 +0200 | [diff] [blame] | 88 | if (ret) { |
Jörg Krause | 7440e4b | 2018-01-14 19:26:40 +0100 | [diff] [blame] | 89 | chip->select_chip(mtd, -1); |
Michael Trimarchi | 4d4862d9 | 2022-07-25 10:06:06 +0200 | [diff] [blame] | 90 | return ret; |
Jörg Krause | 7440e4b | 2018-01-14 19:26:40 +0100 | [diff] [blame] | 91 | } |
| 92 | |
| 93 | return 0; |
| 94 | } |
| 95 | |
| 96 | #else |
| 97 | |
| 98 | /* Trying to detect the NAND flash using ONFi only */ |
Jörg Krause | 404a9db | 2018-01-14 19:26:39 +0100 | [diff] [blame] | 99 | static int mxs_flash_onfi_ident(struct mtd_info *mtd) |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 100 | { |
Scott Wood | 17fed14 | 2016-05-30 13:57:56 -0500 | [diff] [blame] | 101 | register struct nand_chip *chip = mtd_to_nand(mtd); |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 102 | int i; |
| 103 | u8 mfg_id, dev_id; |
| 104 | u8 id_data[8]; |
| 105 | struct nand_onfi_params *p = &chip->onfi_params; |
| 106 | |
| 107 | /* Reset the chip */ |
| 108 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 109 | |
| 110 | /* Send the command for reading device ID */ |
| 111 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
| 112 | |
| 113 | /* Read manufacturer and device IDs */ |
| 114 | mfg_id = chip->read_byte(mtd); |
| 115 | dev_id = chip->read_byte(mtd); |
| 116 | |
| 117 | /* Try again to make sure */ |
| 118 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
| 119 | for (i = 0; i < 8; i++) |
| 120 | id_data[i] = chip->read_byte(mtd); |
| 121 | if (id_data[0] != mfg_id || id_data[1] != dev_id) { |
| 122 | printf("second ID read did not match"); |
| 123 | return -1; |
| 124 | } |
| 125 | debug("0x%02x:0x%02x ", mfg_id, dev_id); |
| 126 | |
| 127 | /* read ONFI */ |
| 128 | chip->onfi_version = 0; |
| 129 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); |
| 130 | if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || |
| 131 | chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') { |
| 132 | return -2; |
| 133 | } |
| 134 | |
| 135 | /* we have ONFI, probe it */ |
| 136 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); |
| 137 | chip->read_buf(mtd, (uint8_t *)p, sizeof(*p)); |
| 138 | mtd->name = p->model; |
| 139 | mtd->writesize = le32_to_cpu(p->byte_per_page); |
| 140 | mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; |
| 141 | mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); |
| 142 | chip->chipsize = le32_to_cpu(p->blocks_per_lun); |
| 143 | chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; |
| 144 | /* Calculate the address shift from the page size */ |
| 145 | chip->page_shift = ffs(mtd->writesize) - 1; |
| 146 | chip->phys_erase_shift = ffs(mtd->erasesize) - 1; |
| 147 | /* Convert chipsize to number of pages per chip -1 */ |
| 148 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
| 149 | chip->badblockbits = 8; |
| 150 | |
| 151 | debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift); |
| 152 | debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift); |
| 153 | debug("oobsize=%d\n", mtd->oobsize); |
| 154 | debug("chipsize=%lld\n", chip->chipsize); |
| 155 | |
| 156 | return 0; |
| 157 | } |
| 158 | |
Jörg Krause | 7440e4b | 2018-01-14 19:26:40 +0100 | [diff] [blame] | 159 | #endif /* CONFIG_SPL_NAND_IDENT */ |
| 160 | |
Jörg Krause | 404a9db | 2018-01-14 19:26:39 +0100 | [diff] [blame] | 161 | static int mxs_flash_ident(struct mtd_info *mtd) |
| 162 | { |
| 163 | int ret; |
Jörg Krause | 7440e4b | 2018-01-14 19:26:40 +0100 | [diff] [blame] | 164 | #if defined (CONFIG_SPL_NAND_IDENT) |
| 165 | ret = mxs_flash_full_ident(mtd); |
| 166 | #else |
Jörg Krause | 404a9db | 2018-01-14 19:26:39 +0100 | [diff] [blame] | 167 | ret = mxs_flash_onfi_ident(mtd); |
Jörg Krause | 7440e4b | 2018-01-14 19:26:40 +0100 | [diff] [blame] | 168 | #endif |
Jörg Krause | 404a9db | 2018-01-14 19:26:39 +0100 | [diff] [blame] | 169 | return ret; |
| 170 | } |
| 171 | |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 172 | static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page) |
| 173 | { |
Scott Wood | 17fed14 | 2016-05-30 13:57:56 -0500 | [diff] [blame] | 174 | register struct nand_chip *chip = mtd_to_nand(mtd); |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 175 | int ret; |
| 176 | |
| 177 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page); |
| 178 | ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page); |
| 179 | if (ret < 0) { |
| 180 | printf("read_page failed %d\n", ret); |
| 181 | return -1; |
| 182 | } |
| 183 | return 0; |
| 184 | } |
| 185 | |
| 186 | static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt) |
| 187 | { |
Scott Wood | 17fed14 | 2016-05-30 13:57:56 -0500 | [diff] [blame] | 188 | register struct nand_chip *chip = mtd_to_nand(mtd); |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 189 | unsigned int block = offs >> chip->phys_erase_shift; |
| 190 | unsigned int page = offs >> chip->page_shift; |
| 191 | |
| 192 | debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block, |
| 193 | page); |
| 194 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); |
| 195 | memset(chip->oob_poi, 0, mtd->oobsize); |
| 196 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 197 | |
| 198 | return chip->oob_poi[0] != 0xff; |
| 199 | } |
| 200 | |
| 201 | /* setup mtd and nand structs and init mxs_nand driver */ |
Adam Ford | 858dd27 | 2019-02-18 17:58:17 -0600 | [diff] [blame] | 202 | void nand_init(void) |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 203 | { |
| 204 | /* return if already initalized */ |
| 205 | if (nand_chip.numchips) |
Adam Ford | 858dd27 | 2019-02-18 17:58:17 -0600 | [diff] [blame] | 206 | return; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 207 | |
| 208 | /* init mxs nand driver */ |
Stefan Agner | 7152f34 | 2018-06-22 17:19:46 +0200 | [diff] [blame] | 209 | mxs_nand_init_spl(&nand_chip); |
Boris Brezillon | 3b5f884 | 2016-06-15 20:56:10 +0200 | [diff] [blame] | 210 | mtd = nand_to_mtd(&nand_chip); |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 211 | /* set mtd functions */ |
| 212 | nand_chip.cmdfunc = mxs_nand_command; |
Adam Ford | cf87371 | 2018-12-30 10:11:16 -0600 | [diff] [blame] | 213 | nand_chip.scan_bbt = nand_default_bbt; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 214 | nand_chip.numchips = 1; |
| 215 | |
| 216 | /* identify flash device */ |
Scott Wood | 2c1b7e1 | 2016-05-30 13:57:55 -0500 | [diff] [blame] | 217 | if (mxs_flash_ident(mtd)) { |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 218 | printf("Failed to identify\n"); |
Adam Ford | 858dd27 | 2019-02-18 17:58:17 -0600 | [diff] [blame] | 219 | nand_chip.numchips = 0; /* If fail, don't use nand */ |
| 220 | return; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 221 | } |
| 222 | |
| 223 | /* allocate and initialize buffers */ |
| 224 | nand_chip.buffers = memalign(ARCH_DMA_MINALIGN, |
| 225 | sizeof(*nand_chip.buffers)); |
Scott Wood | 2c1b7e1 | 2016-05-30 13:57:55 -0500 | [diff] [blame] | 226 | nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 227 | /* setup flash layout (does not scan as we override that) */ |
Scott Wood | 2c1b7e1 | 2016-05-30 13:57:55 -0500 | [diff] [blame] | 228 | mtd->size = nand_chip.chipsize; |
| 229 | nand_chip.scan_bbt(mtd); |
Adam Ford | 1021073 | 2019-01-02 20:36:52 -0600 | [diff] [blame] | 230 | mxs_nand_setup_ecc(mtd); |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 231 | } |
| 232 | |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 233 | int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 234 | { |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 235 | unsigned int sz; |
| 236 | unsigned int block, lastblock; |
| 237 | unsigned int page, page_offset; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 238 | unsigned int nand_page_per_block; |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 239 | struct nand_chip *chip; |
Ye Li | cf63923 | 2020-05-04 22:08:55 +0800 | [diff] [blame] | 240 | u8 *page_buf = NULL; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 241 | |
Scott Wood | 17fed14 | 2016-05-30 13:57:56 -0500 | [diff] [blame] | 242 | chip = mtd_to_nand(mtd); |
Adam Ford | 858dd27 | 2019-02-18 17:58:17 -0600 | [diff] [blame] | 243 | if (!chip->numchips) |
| 244 | return -ENODEV; |
Ye Li | cf63923 | 2020-05-04 22:08:55 +0800 | [diff] [blame] | 245 | |
| 246 | page_buf = malloc(mtd->writesize); |
| 247 | if (!page_buf) |
| 248 | return -ENOMEM; |
| 249 | |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 250 | /* offs has to be aligned to a page address! */ |
| 251 | block = offs / mtd->erasesize; |
| 252 | lastblock = (offs + size - 1) / mtd->erasesize; |
| 253 | page = (offs % mtd->erasesize) / mtd->writesize; |
| 254 | page_offset = offs % mtd->writesize; |
Scott Wood | 2c1b7e1 | 2016-05-30 13:57:55 -0500 | [diff] [blame] | 255 | nand_page_per_block = mtd->erasesize / mtd->writesize; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 256 | |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 257 | while (block <= lastblock && size > 0) { |
| 258 | if (!is_badblock(mtd, mtd->erasesize * block, 1)) { |
| 259 | /* Skip bad blocks */ |
| 260 | while (page < nand_page_per_block) { |
| 261 | int curr_page = nand_page_per_block * block + page; |
Ye Li | cf63923 | 2020-05-04 22:08:55 +0800 | [diff] [blame] | 262 | |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 263 | if (mxs_read_page_ecc(mtd, page_buf, curr_page) < 0) { |
Ye Li | cf63923 | 2020-05-04 22:08:55 +0800 | [diff] [blame] | 264 | free(page_buf); |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 265 | return -EIO; |
Ye Li | cf63923 | 2020-05-04 22:08:55 +0800 | [diff] [blame] | 266 | } |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 267 | |
| 268 | if (size > (mtd->writesize - page_offset)) |
| 269 | sz = (mtd->writesize - page_offset); |
| 270 | else |
| 271 | sz = size; |
| 272 | |
| 273 | memcpy(dst, page_buf + page_offset, sz); |
| 274 | dst += sz; |
| 275 | size -= sz; |
| 276 | page_offset = 0; |
| 277 | page++; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 278 | } |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 279 | |
| 280 | page = 0; |
| 281 | } else { |
| 282 | lastblock++; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 283 | } |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 284 | |
| 285 | block++; |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 286 | } |
| 287 | |
Ye Li | cf63923 | 2020-05-04 22:08:55 +0800 | [diff] [blame] | 288 | free(page_buf); |
| 289 | |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 290 | return 0; |
| 291 | } |
| 292 | |
| 293 | int nand_default_bbt(struct mtd_info *mtd) |
| 294 | { |
| 295 | return 0; |
| 296 | } |
| 297 | |
Tim Harvey | dcf4066 | 2014-06-02 16:13:18 -0700 | [diff] [blame] | 298 | void nand_deselect(void) |
| 299 | { |
| 300 | } |
Ye Li | 9caf951 | 2021-08-17 17:24:47 +0800 | [diff] [blame] | 301 | |
| 302 | u32 nand_spl_adjust_offset(u32 sector, u32 offs) |
| 303 | { |
Michael Trimarchi | 95f4238 | 2022-05-15 11:35:31 +0200 | [diff] [blame] | 304 | unsigned int block, lastblock; |
| 305 | |
| 306 | block = sector / mtd->erasesize; |
| 307 | lastblock = (sector + offs) / mtd->erasesize; |
| 308 | |
| 309 | while (block <= lastblock) { |
| 310 | if (is_badblock(mtd, block * mtd->erasesize, 1)) { |
| 311 | offs += mtd->erasesize; |
| 312 | lastblock++; |
| 313 | } |
| 314 | |
| 315 | block++; |
| 316 | } |
| 317 | |
Ye Li | 9caf951 | 2021-08-17 17:24:47 +0800 | [diff] [blame] | 318 | return offs; |
| 319 | } |