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wdenkef3386f2004-10-10 21:27:30 +00001/*
2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkef3386f2004-10-10 21:27:30 +00006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*------------------------------------------------------------------------
12 * BOARD/CPU
13 *----------------------------------------------------------------------*/
14#define CONFIG_PCI5441 1 /* PCI-5441 board */
15#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
16
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020017#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address */
18#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
19#define CONFIG_SYS_NIOS_SYSID_BASE 0x00920828 /* System id address */
wdenkef3386f2004-10-10 21:27:30 +000020#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
21
22/*------------------------------------------------------------------------
23 * CACHE -- the following will support II/s and II/f. The II/s does not
24 * have dcache, so the cache instructions will behave as NOPs.
25 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020026#define CONFIG_SYS_ICACHE_SIZE 4096 /* 4 KByte total */
27#define CONFIG_SYS_ICACHELINE_SIZE 32 /* 32 bytes/line */
28#define CONFIG_SYS_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
29#define CONFIG_SYS_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
wdenkef3386f2004-10-10 21:27:30 +000030
31/*------------------------------------------------------------------------
32 * MEMORY BASE ADDRESSES
33 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020034#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr */
35#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
36#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr */
37#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte */
wdenkef3386f2004-10-10 21:27:30 +000038
39/*------------------------------------------------------------------------
40 * MEMORY ORGANIZATION
Wolfgang Denka1be4762008-05-20 16:00:29 +020041 * -Monitor at top.
42 * -The heap is placed below the monitor.
43 * -Global data is placed below the heap.
44 * -The stack is placed below global data (&grows down).
wdenkef3386f2004-10-10 21:27:30 +000045 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020046#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* Reserve 128k */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020047#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
wdenkef3386f2004-10-10 21:27:30 +000048
Wolfgang Denk0708bc62010-10-07 21:51:12 +020049#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020050#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
Wolfgang Denk0191e472010-10-26 14:34:52 +020051#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
wdenkef3386f2004-10-10 21:27:30 +000053
54/*------------------------------------------------------------------------
55 * FLASH (AM29LV065D)
56 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020057#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
58#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
59#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
60#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
61#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */
wdenkef3386f2004-10-10 21:27:30 +000062
63/*------------------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020064 * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
65 * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
wdenkef3386f2004-10-10 21:27:30 +000066 * reset address, no? This will keep the environment in user region
67 * of flash. NOTE: the monitor length must be multiple of sector size
68 * (which is common practice).
69 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +020070#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020071#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
wdenkef3386f2004-10-10 21:27:30 +000072#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020073#define CONFIG_ENV_ADDR (CONFIG_SYS_RESET_ADDR + CONFIG_SYS_MONITOR_LEN)
wdenkef3386f2004-10-10 21:27:30 +000074
75/*------------------------------------------------------------------------
76 * CONSOLE
77 *----------------------------------------------------------------------*/
Scott McNutt4a889822010-03-19 19:03:28 -040078#define CONFIG_ALTERA_UART 1 /* Use altera uart */
79#if defined(CONFIG_ALTERA_JTAG_UART)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020080#define CONFIG_SYS_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr */
wdenkef3386f2004-10-10 21:27:30 +000081#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082#define CONFIG_SYS_NIOS_CONSOLE 0x009208a0 /* UART base addr */
wdenkef3386f2004-10-10 21:27:30 +000083#endif
84
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020085#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
wdenkef3386f2004-10-10 21:27:30 +000086#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020087#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
wdenkef3386f2004-10-10 21:27:30 +000088
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
wdenkef3386f2004-10-10 21:27:30 +000090
91/*------------------------------------------------------------------------
92 * DEBUG
93 *----------------------------------------------------------------------*/
94#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
95
96/*------------------------------------------------------------------------
97 * TIMEBASE --
98 *
99 * The high res timer defaults to 1 msec. Since it includes the period
Scott McNutt205458b2010-03-30 20:23:04 -0400100 * registers, the interrupt frequency can be reduced using TMRCNT.
101 * If the default period is acceptable, TMRCNT can be left undefined.
102 * TMRMS represents the desired mecs per tick (msecs per interrupt).
wdenkef3386f2004-10-10 21:27:30 +0000103 *----------------------------------------------------------------------*/
Scott McNutt205458b2010-03-30 20:23:04 -0400104#define CONFIG_SYS_HZ 1000 /* Always 1000 */
Graeme Russ13ec42b2011-07-15 02:18:56 +0000105#define CONFIG_SYS_LOW_RES_TIMER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200106#define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */
Scott McNutt205458b2010-03-30 20:23:04 -0400107#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */
108#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/
109#define CONFIG_SYS_NIOS_TMRCNT \
110 (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
wdenkef3386f2004-10-10 21:27:30 +0000111
Jon Loeligercc1f0bb2007-07-08 14:49:44 -0500112
113/*
Jon Loeligerbeb9ff42007-07-10 09:22:23 -0500114 * BOOTP options
115 */
116#define CONFIG_BOOTP_BOOTFILESIZE
117#define CONFIG_BOOTP_BOOTPATH
118#define CONFIG_BOOTP_GATEWAY
119#define CONFIG_BOOTP_HOSTNAME
120
121
122/*
Jon Loeligercc1f0bb2007-07-08 14:49:44 -0500123 * Command line configuration.
124 */
125#define CONFIG_CMD_BDI
126#define CONFIG_CMD_ECHO
Mike Frysinger78dcaf42009-01-28 19:08:14 -0500127#define CONFIG_CMD_SAVEENV
Jon Loeligercc1f0bb2007-07-08 14:49:44 -0500128#define CONFIG_CMD_FLASH
129#define CONFIG_CMD_IMI
130#define CONFIG_CMD_IRQ
131#define CONFIG_CMD_LOADS
132#define CONFIG_CMD_LOADB
133#define CONFIG_CMD_MEMORY
134#define CONFIG_CMD_MISC
135#define CONFIG_CMD_RUN
136#define CONFIG_CMD_SAVES
137
wdenkef3386f2004-10-10 21:27:30 +0000138
139/*------------------------------------------------------------------------
140 * MISC
141 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200142#define CONFIG_SYS_LONGHELP /* Provide extended help*/
143#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
144#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
145#define CONFIG_SYS_MAXARGS 16 /* Max command args */
146#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */
147#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buf size */
148#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* Default load address */
149#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* Start addr for test */
150#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_INIT_SP - 0x00020000
wdenkef3386f2004-10-10 21:27:30 +0000151
152#endif /* __CONFIG_H */