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Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +02001/*
2 * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
3 *
4 * Configuation settings for the TI OMAP NetStar board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28#include <configs/omap1510.h>
29
30/*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
35#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP1510 1 /* which is in a 5910 */
37
38/* Input clock of PLL */
39#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */
40#define CONFIG_XTAL_FREQ 12000000
41
42#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43
44#define CONFIG_MISC_INIT_R /* There is nothing to really init */
45#define BOARD_LATE_INIT /* but we flash the LEDs here */
46
47#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
48#define CONFIG_SETUP_MEMORY_TAGS 1
49#define CONFIG_INITRD_TAG 1
50
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020051#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#define CONFIG_SYS_CONSOLE_INFO_QUIET
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020053
54/*
55 * Physical Memory Map
56 */
57#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
58#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
Peter Pearse1b079e02008-02-01 16:49:08 +000059#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020060#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
61
62/*
63 * FLASH organization
64 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
66#define CONFIG_SYS_MAX_FLASH_BANKS 1
Peter Pearse1b079e02008-02-01 16:49:08 +000067#define PHYS_FLASH_1_SIZE (1 * 1024 * 1024)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020068#define CONFIG_SYS_MAX_FLASH_SECT 19
69#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* in ticks */
70#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ)
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020071
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020072#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
73#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020074
75/*
76 * Environment settings
77 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +020078#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020079#define CONFIG_ENV_ADDR 0x4000
80#define CONFIG_ENV_SIZE (8 * 1024)
81#define CONFIG_ENV_SECT_SIZE (8 * 1024)
82#define CONFIG_ENV_ADDR_REDUND 0x6000
83#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020084#define CONFIG_ENV_OVERWRITE
85
86/*
87 * Size of malloc() pool
88 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
90#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020091
92/*
93 * The stack size is set up in start.S using the settings below
94 */
Peter Pearse1b079e02008-02-01 16:49:08 +000095#define CONFIG_STACKSIZE (1 * 1024 * 1024) /* regular stack */
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020096
97/*
98 * Hardware drivers
99 */
100#define CONFIG_DRIVER_SMC91111
101#define CONFIG_SMC91111_BASE 0x04000300
102
103/*
104 * NS16550 Configuration
105 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200106#define CONFIG_SYS_NS16550
107#define CONFIG_SYS_NS16550_SERIAL
108#define CONFIG_SYS_NS16550_REG_SIZE (-4)
109#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
110#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200111
112#define CONFIG_CONS_INDEX 1
113#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200114#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200115
116/*#define CONFIG_SKIP_RELOCATE_UBOOT*/
117/*#define CONFIG_SKIP_LOWLEVEL_INIT */
118
119/*
120 * NAND flash
121 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200122#define CONFIG_SYS_MAX_NAND_DEVICE 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23)
Peter Pearse1b079e02008-02-01 16:49:08 +0000124#define NAND_ALLOW_ERASE_ALL 1
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200125
126/*
Peter Pearse1b079e02008-02-01 16:49:08 +0000127 * partitions (mtdparts command line support)
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200128 */
129#define CONFIG_JFFS2_CMDLINE
130#define MTDIDS_DEFAULT "nor0=omapflash.0,nand0=omapnand.0"
Peter Pearse1b079e02008-02-01 16:49:08 +0000131#define MTDPARTS_DEFAULT "mtdparts=" \
132 "omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
133 "omapnand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200134
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200135
Jon Loeliger74fdb632007-07-04 22:33:07 -0500136/*
137 * Command line configuration.
138 */
139
140#define CONFIG_CMD_BDI
141#define CONFIG_CMD_BOOTD
142#define CONFIG_CMD_DHCP
143#define CONFIG_CMD_ENV
144#define CONFIG_CMD_FLASH
145#define CONFIG_CMD_IMI
146#define CONFIG_CMD_JFFS2
147#define CONFIG_CMD_LOADB
148#define CONFIG_CMD_MEMORY
149#define CONFIG_CMD_NAND
150#define CONFIG_CMD_NET
151#define CONFIG_CMD_PING
152#define CONFIG_CMD_RUN
153
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200154
155#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200156
Jon Loeligerc6d535a2007-07-09 21:57:31 -0500157/*
158 * BOOTP options
159 */
160#define CONFIG_BOOTP_SUBNETMASK
161#define CONFIG_BOOTP_GATEWAY
162#define CONFIG_BOOTP_HOSTNAME
163#define CONFIG_BOOTP_BOOTPATH
164
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200165#define CONFIG_LOOPW
166
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200167#define CONFIG_BOOTDELAY 3
168#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
169#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200170#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
Peter Pearse1b079e02008-02-01 16:49:08 +0000171#define CONFIG_BOOTCOMMAND "run fboot"
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200172#define CONFIG_PREBOOT "run setup"
Peter Pearse1b079e02008-02-01 16:49:08 +0000173#define CONFIG_EXTRA_ENV_SETTINGS \
174 "autostart=yes\0" \
175 "ospart=0\0" \
176 "setup=setenv bootargs console=ttyS0,$baudrate " \
177 "$mtdparts\0" \
178 "setpart=" \
179 "if test -n $swapos; then " \
180 "setenv swapos; saveenv; " \
181 "else " \
Wolfgang Denka1be4762008-05-20 16:00:29 +0200182 "if test $ospart -eq 0; then setenv ospart 1;" \
183 "else setenv ospart 0; fi; " \
Peter Pearse1b079e02008-02-01 16:49:08 +0000184 "fi\0" \
185 "nfsargs=setenv bootargs $bootargs " \
Wolfgang Denka1be4762008-05-20 16:00:29 +0200186 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
Peter Pearse1b079e02008-02-01 16:49:08 +0000187 "nfsroot=$rootpath root=/dev/nfs\0" \
188 "flashargs=run setpart;setenv bootargs $bootargs " \
189 "root=mtd:rootfs$ospart ro " \
190 "rootfstype=jffs2\0" \
Wolfgang Denka1be4762008-05-20 16:00:29 +0200191 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
Peter Pearse1b079e02008-02-01 16:49:08 +0000192 "fboot=run flashargs;nboot kernel$ospart\0" \
193 "nboot=bootp;run nfsargs;tftp\0"
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200194
195#if 0 /* feel free to disable for development */
196#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
Stefan Roese37628252008-08-06 14:05:38 +0200197#define CONFIG_AUTOBOOT_PROMPT \
198 "\nNetStar PBX - boot in %d secs...\n", bootdelay
Peter Pearse1b079e02008-02-01 16:49:08 +0000199#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200200#endif
201
202/*
203 * Miscellaneous configurable options
204 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200205#define CONFIG_SYS_LONGHELP /* undef to save memory */
206#define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */
207#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
208#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
209#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
210#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200211
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200212#define CONFIG_SYS_HUSH_PARSER
213#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200214#define CONFIG_AUTO_COMPLETE
215
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200216#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
217#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
218 (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200219
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200220#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200221
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200222#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200223
224/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
225 * This time is further subdivided by a local divisor.
226 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200227#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
228#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
229#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +0200230
231#define OMAP5910_DPLL_DIV 1
232#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
233 (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
234
235#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
236#define OMAP5910_LCD_DIV 2 /* CKL/4 */
237#define OMAP5910_ARM_DIV 0 /* CKL/1 */
238#define OMAP5910_DSP_DIV 0 /* CKL/1 */
239#define OMAP5910_TC_DIV 1 /* CKL/2 */
240#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
241#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
242
243#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */
244#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
245 (OMAP5910_LCD_DIV << 2) | \
246 (OMAP5910_ARM_DIV << 4) | \
247 (OMAP5910_DSP_DIV << 6) | \
248 (OMAP5910_TC_DIV << 8) | \
249 (OMAP5910_DSP_MMU_DIV << 10) | \
250 (OMAP5910_ARM_TIM_SEL << 12))
251
252#endif /* __CONFIG_H */