wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | #ifndef __CONFIG_H |
| 24 | #define __CONFIG_H |
| 25 | |
| 26 | /* |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 27 | * High Level Configuration Options |
| 28 | * (easy to change) |
| 29 | */ |
| 30 | #define CONFIG_ARM925T 1 /* This is an arm925t CPU */ |
| 31 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ |
| 32 | #define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */ |
| 33 | #define CONFIG_OMAP_SX1 1 /* a SX1 Board */ |
| 34 | |
| 35 | /* input clock of PLL */ |
| 36 | #define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */ |
| 37 | |
| 38 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 39 | |
| 40 | #define CONFIG_MISC_INIT_R |
| 41 | |
| 42 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 43 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 44 | #define CONFIG_INITRD_TAG 1 |
| 45 | |
| 46 | /* |
| 47 | * Size of malloc() pool |
| 48 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 49 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
| 50 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 51 | |
| 52 | /* |
| 53 | * Hardware drivers |
| 54 | */ |
| 55 | |
| 56 | /* |
| 57 | * NS16550 Configuration |
| 58 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 59 | #define CONFIG_SYS_NS16550 |
| 60 | #define CONFIG_SYS_NS16550_SERIAL |
| 61 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 62 | #define CONFIG_SYS_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */ |
| 63 | #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 64 | |
| 65 | /* |
| 66 | * select serial console configuration |
| 67 | */ |
| 68 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SX1 */ |
| 69 | |
| 70 | /* |
| 71 | * USB device configuration |
| 72 | */ |
| 73 | #define CONFIG_USB_DEVICE 1 |
| 74 | #define CONFIG_USB_TTY 1 |
| 75 | |
| 76 | #define CONFIG_USBD_VENDORID 0x1234 |
| 77 | #define CONFIG_USBD_PRODUCTID 0x5678 |
| 78 | #define CONFIG_USBD_MANUFACTURER "Siemens" |
| 79 | #define CONFIG_USBD_PRODUCT_NAME "SX1" |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 80 | |
| 81 | /* |
| 82 | * I2C configuration |
| 83 | */ |
| 84 | #define CONFIG_HARD_I2C |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 86 | #define CONFIG_SYS_I2C_SLAVE 1 |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 87 | #define CONFIG_DRIVER_OMAP1510_I2C |
| 88 | |
| 89 | #define CONFIG_ENV_OVERWRITE |
| 90 | |
| 91 | #define CONFIG_ENV_OVERWRITE |
| 92 | #define CONFIG_CONS_INDEX 1 |
| 93 | #define CONFIG_BAUDRATE 115200 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 94 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 95 | |
Jon Loeliger | d866df3 | 2007-07-08 15:02:44 -0500 | [diff] [blame] | 96 | |
| 97 | /* |
Jon Loeliger | beb9ff4 | 2007-07-10 09:22:23 -0500 | [diff] [blame] | 98 | * BOOTP options |
| 99 | */ |
| 100 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 101 | #define CONFIG_BOOTP_BOOTPATH |
| 102 | #define CONFIG_BOOTP_GATEWAY |
| 103 | #define CONFIG_BOOTP_HOSTNAME |
| 104 | |
| 105 | |
| 106 | /* |
Jon Loeliger | d866df3 | 2007-07-08 15:02:44 -0500 | [diff] [blame] | 107 | * Command line configuration. |
| 108 | */ |
| 109 | #include <config_cmd_default.h> |
| 110 | |
| 111 | #define CONFIG_CMD_I2C |
| 112 | |
| 113 | #undef CONFIG_CMD_NET |
| 114 | |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 115 | |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 116 | #include <configs/omap1510.h> |
| 117 | |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 118 | #define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw" |
wdenk | 05822bf | 2004-03-12 15:38:25 +0000 | [diff] [blame] | 119 | #define CONFIG_PREBOOT "setenv stdout usbtty;setenv stdin usbtty" |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 120 | |
| 121 | /* |
| 122 | * Miscellaneous configurable options |
| 123 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 125 | #define CONFIG_SYS_PROMPT "SX1# " /* Monitor Command Prompt */ |
| 126 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 127 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 128 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 129 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 130 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 131 | #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ |
| 132 | #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 133 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 135 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 136 | #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 137 | |
| 138 | /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. |
| 139 | * This time is further subdivided by a local divisor. |
| 140 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ |
| 142 | #define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ |
| 143 | #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 144 | |
| 145 | /*----------------------------------------------------------------------- |
| 146 | * Stack sizes |
| 147 | * |
| 148 | * The stack sizes are set up in start.S using the settings below |
| 149 | */ |
| 150 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 151 | #ifdef CONFIG_USE_IRQ |
| 152 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 153 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 154 | #endif |
| 155 | |
| 156 | /*----------------------------------------------------------------------- |
| 157 | * Physical Memory Map |
| 158 | */ |
| 159 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 160 | #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ |
| 161 | #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ |
| 162 | |
| 163 | #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ |
| 164 | #define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ |
| 165 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 166 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 167 | |
| 168 | /*----------------------------------------------------------------------- |
| 169 | * FLASH and environment organization |
| 170 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 171 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
wdenk | e85b7a5 | 2004-10-10 22:16:06 +0000 | [diff] [blame] | 172 | #define PHYS_FLASH_SIZE (16 << 10) /* 16 MB */ |
| 173 | #define PHYS_FLASH_SECT_SIZE (128*1024) /* Size of a sector (128kB) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 174 | #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ |
| 175 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */ |
| 176 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ |
| 177 | #define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */ |
| 178 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE } |
wdenk | e85b7a5 | 2004-10-10 22:16:06 +0000 | [diff] [blame] | 179 | |
| 180 | /*----------------------------------------------------------------------- |
| 181 | * FLASH driver setup |
| 182 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 183 | #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 184 | #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 185 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ |
| 186 | #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 187 | |
| 188 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 189 | #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 190 | #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 191 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 192 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 193 | #define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE |
| 194 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 195 | #define CONFIG_ENV_OFFSET ( CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN ) /* Environment after Monitor */ |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 196 | |
wdenk | 05822bf | 2004-03-12 15:38:25 +0000 | [diff] [blame] | 197 | /* Address and size of Redundant Environment Sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 198 | #define CONFIG_ENV_SIZE_REDUND 0x20000 |
| 199 | #define CONFIG_ENV_OFFSET_REDUND 0x40000 |
wdenk | 05822bf | 2004-03-12 15:38:25 +0000 | [diff] [blame] | 200 | |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 201 | #endif /* __CONFIG_H */ |