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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Alexey Brodkin9aea0282014-05-21 14:39:32 +04002/*
3 * Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems
Alexey Brodkin9aea0282014-05-21 14:39:32 +04004 */
5
6#ifndef _CONFIG_TB100_H_
7#define _CONFIG_TB100_H_
8
9#include <linux/sizes.h>
10
11/*
Alexey Brodkin9aea0282014-05-21 14:39:32 +040012 * Memory configuration
13 */
Alexey Brodkin9aea0282014-05-21 14:39:32 +040014
15#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
16#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
17#define CONFIG_SYS_SDRAM_SIZE SZ_128M
18
Alexey Brodkin9aea0282014-05-21 14:39:32 +040019/*
20 * UART configuration
21 */
Alexey Brodkin9aea0282014-05-21 14:39:32 +040022#define CONFIG_SYS_NS16550_SERIAL
Alexey Brodkin9aea0282014-05-21 14:39:32 +040023#define CONFIG_SYS_NS16550_CLK 166666666
Alexey Brodkin9aea0282014-05-21 14:39:32 +040024
25/*
Alexey Brodkin9aea0282014-05-21 14:39:32 +040026 * Even though the board houses Realtek RTL8211E PHY
27 * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
28 * In particular "parse_status" reports link is down.
29 *
30 * Until Realtek PHY driver is fixed fall back to generic PHY driver
31 * which implements all required functionality and behaves much more stable.
32 *
Alexey Brodkin9aea0282014-05-21 14:39:32 +040033 *
34 */
35
36/*
37 * Ethernet configuration
38 */
Alexey Brodkin9aea0282014-05-21 14:39:32 +040039#define ETH0_BASE_ADDRESS 0xFE100000
40#define ETH1_BASE_ADDRESS 0xFE110000
41
42/*
Alexey Brodkin9aea0282014-05-21 14:39:32 +040043 * Console configuration
44 */
Alexey Brodkin9aea0282014-05-21 14:39:32 +040045
46#endif /* _CONFIG_TB100_H_ */