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git01.mediatek.com / filogic / uboot / 28db46949720cea53fa7a1f57b68064fc2e86d4f / . / arch / sandbox / dts / sandbox.dts
blob: c0bdba94a7310174a4ed8efd0ec6a774c76d5f38 [file] [log] [blame]
Simon Glass66c164b2014-02-26 15:59:14 -0700[diff] [blame]1/dts-v1/;
2
3/ {
Simon Glassfd91fc92014-10-13 23:41:48 -0600[diff] [blame]4 #address-cells = <1>;
Simon Glassf905be82015-03-05 12:25:13 -0700[diff] [blame]5 #size-cells = <1>;
Simon Glass00c34d5b2017-06-15 21:37:53 -0600[diff] [blame]6 model = "sandbox";
Simon Glassfd91fc92014-10-13 23:41:48 -0600[diff] [blame]7
Simon Glass70778bc2015-03-05 12:25:26 -0700[diff] [blame]8 aliases {
Simon Glass72138b92015-04-20 12:37:28 -0600[diff] [blame]9 i2c0 = &i2c_0;
Simon Glass70778bc2015-03-05 12:25:26 -0700[diff] [blame]10 pci0 = &pci;
Simon Glass72138b92015-04-20 12:37:28 -0600[diff] [blame]11 rtc0 = &rtc_0;
Mario Six95922152018-08-09 14:51:19 +0200[diff] [blame]12 axi0 = &axi;
Simon Glass70778bc2015-03-05 12:25:26 -0700[diff] [blame]13 };
14
Simon Glass699c9ca2018-10-01 12:22:08 -0600[diff] [blame]15 cros_ec: cros-ec {
Simon Glass73f220c2015-03-26 09:29:39 -0600[diff] [blame]16 reg = <0 0>;
Simon Glasse5501552018-11-06 15:21:27 -0700[diff] [blame]17 u-boot,dm-pre-reloc;
Simon Glass73f220c2015-03-26 09:29:39 -0600[diff] [blame]18 compatible = "google,cros-ec-sandbox";
Simon Glass1f6acb52014-02-27 13:25:59 -0700[diff] [blame]19 };
20
Joe Hershberger89590c82018-07-02 14:47:54 -0500[diff] [blame]21 ethrawbus {
22 compatible = "sandbox,eth-raw-bus";
23 skip-localhost = <0>;
24 };
25
Simon Glass45ab0082015-05-22 15:42:16 -0600[diff] [blame]26 eth@10002000 {
27 compatible = "sandbox,eth";
28 reg = <0x10002000 0x1000>;
29 fake-host-hwaddr = [00 00 66 44 22 00];
30 };
31
Simon Glass72138b92015-04-20 12:37:28 -0600[diff] [blame]32 i2c_0: i2c@0 {
Simon Glass4f46a592014-12-10 08:55:53 -0700[diff] [blame]33 #address-cells = <1>;
34 #size-cells = <0>;
Simon Glassf905be82015-03-05 12:25:13 -0700[diff] [blame]35 reg = <0 0>;
Simon Glass4f46a592014-12-10 08:55:53 -0700[diff] [blame]36 compatible = "sandbox,i2c";
37 clock-frequency = <400000>;
Masahiro Yamada0b53a752015-08-27 12:44:30 +0900[diff] [blame]38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_i2c0>;
Simon Glassfefc7ba2017-04-10 11:34:51 -0600[diff] [blame]40 };
41
Simon Glass70778bc2015-03-05 12:25:26 -0700[diff] [blame]42 pci: pci-controller {
43 compatible = "sandbox,pci";
44 device_type = "pci";
45 #address-cells = <3>;
46 #size-cells = <2>;
47 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
48 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
Simon Glass70778bc2015-03-05 12:25:26 -0700[diff] [blame]49 };
50
Simon Glass45ab0082015-05-22 15:42:16 -0600[diff] [blame]51 spi@0 {
Simon Glasse5501552018-11-06 15:21:27 -0700[diff] [blame]52 u-boot,dm-pre-reloc;
Simon Glass45ab0082015-05-22 15:42:16 -0600[diff] [blame]53 #address-cells = <1>;
54 #size-cells = <0>;
55 reg = <0 0>;
56 compatible = "sandbox,spi";
57 cs-gpios = <0>, <&gpio_a 0>;
Joe Hershberger6ab76992015-03-22 17:09:13 -0500[diff] [blame]58 };
Joe Hershberger586cbd12015-03-22 17:09:21 -0500[diff] [blame]59
Simon Glass66c164b2014-02-26 15:59:14 -0700[diff] [blame]60};
Simon Glass73f220c2015-03-26 09:29:39 -0600[diff] [blame]61
Simon Glass28db4692019-05-18 11:59:41 -0600[diff] [blame^]62#include "sandbox.dtsi"
Simon Glass73f220c2015-03-26 09:29:39 -0600[diff] [blame]63#include "cros-ec-keyboard.dtsi"
Przemyslaw Marczak77bee052015-05-13 13:38:35 +0200[diff] [blame]64#include "sandbox_pmic.dtsi"