blob: 0ca91cdeb014c77cd17f598da55fb78727dfe42a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
huang lina77e50c2015-12-07 11:08:57 +08002/*
3 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
huang lina77e50c2015-12-07 11:08:57 +08004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glassed38aef2020-05-10 11:40:03 -06008#include <env.h>
Simon Glassa7b51302019-11-14 12:57:46 -07009#include <init.h>
huang lina77e50c2015-12-07 11:08:57 +080010#include <asm/io.h>
Kever Yang9fbe17c2019-03-28 11:01:23 +080011#include <asm/arch-rockchip/uart.h>
12#include <asm/arch-rockchip/sdram_rk3036.h>
Jeffy Chena32d0092016-01-14 10:19:40 +080013#include <asm/gpio.h>
huang lina77e50c2015-12-07 11:08:57 +080014
huang lina77e50c2015-12-07 11:08:57 +080015void get_ddr_config(struct rk3036_ddr_config *config)
16{
17 /* K4B4G1646Q config */
18 config->ddr_type = 3;
19 config->rank = 1;
20 config->cs0_row = 15;
21 config->cs1_row = 15;
22
23 /* 8bank */
24 config->bank = 3;
25 config->col = 10;
26
27 /* 16bit bw */
28 config->bw = 1;
29}
30
Jeffy Chena32d0092016-01-14 10:19:40 +080031#define FASTBOOT_KEY_GPIO 93
32
33int fastboot_key_pressed(void)
34{
35 gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
36 gpio_direction_input(FASTBOOT_KEY_GPIO);
37 return !gpio_get_value(FASTBOOT_KEY_GPIO);
38}
39
40#define ROCKCHIP_BOOT_MODE_FASTBOOT 0x5242C309
41
Jacob Chenc95f3782016-09-19 18:46:28 +080042int rk_board_late_init(void)
Jeffy Chena32d0092016-01-14 10:19:40 +080043{
Jacob Chenc95f3782016-09-19 18:46:28 +080044 if (fastboot_key_pressed()) {
Jeffy Chena32d0092016-01-14 10:19:40 +080045 printf("enter fastboot!\n");
Simon Glass6a38e412017-08-03 12:22:09 -060046 env_set("preboot", "setenv preboot; fastboot usb0");
Jeffy Chena32d0092016-01-14 10:19:40 +080047 }
48
49 return 0;
50}