Michal Simek | 2e53eb2 | 2022-09-19 14:21:02 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2016 - 2022, Xilinx, Inc. |
| 4 | * Copyright (C) 2022, Advanced Micro Devices, Inc. |
| 5 | */ |
| 6 | |
| 7 | #ifndef __ASSEMBLY__ |
| 8 | #include <linux/bitops.h> |
| 9 | #endif |
| 10 | |
| 11 | #define PMC_TAP 0xF11A0000 |
| 12 | |
| 13 | #define PMC_TAP_IDCODE (PMC_TAP + 0) |
| 14 | #define PMC_TAP_VERSION (PMC_TAP + 0x4) |
| 15 | # define PMC_VERSION_MASK GENMASK(7, 0) |
| 16 | # define PS_VERSION_MASK GENMASK(15, 8) |
| 17 | # define RTL_VERSION_MASK GENMASK(23, 16) |
| 18 | # define PLATFORM_MASK GENMASK(27, 24) |
| 19 | # define PLATFORM_VERSION_MASK GENMASK(31, 28) |
| 20 | #define PMC_TAP_USERCODE (PMC_TAP + 0x8) |
| 21 | |
| 22 | enum versal_net_platform { |
| 23 | VERSAL_NET_SILICON = 0, |
| 24 | VERSAL_NET_SPP = 1, |
| 25 | VERSAL_NET_EMU = 2, |
| 26 | VERSAL_NET_QEMU = 3, |
| 27 | }; |
Michal Simek | 2895a22 | 2022-09-19 14:21:03 +0200 | [diff] [blame^] | 28 | |
| 29 | #define VERSAL_SLCR_BASEADDR 0xF1060000 |
| 30 | #define VERSAL_AXI_MUX_SEL (VERSAL_SLCR_BASEADDR + 0x504) |
| 31 | #define VERSAL_OSPI_LINEAR_MODE BIT(1) |