blob: d1e27c42d4c9667b268a4f36b140dada5ed5f8f4 [file] [log] [blame]
Kumar Galae38209e2011-02-09 02:00:08 +00001/*
2 * Copyright 2009-2011 Freescale Semiconductor, Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23/*
24 * P5020 DS board configuration file
Scott Wooda1ef48c2012-08-14 10:14:51 +000025 * Also supports P5010 DS
Kumar Galae38209e2011-02-09 02:00:08 +000026 */
27#define CONFIG_P5020DS
28#define CONFIG_PHYS_64BIT
29#define CONFIG_PPC_P5020
30
Kumar Galad0af3b92011-08-31 09:50:13 -050031#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
32
33#define CONFIG_MMC
34#define CONFIG_NAND_FSL_ELBC
Zang Roy-R619112ce421a2012-11-26 00:05:38 +000035#define CONFIG_FSL_SATA_V2
Kumar Galad0af3b92011-08-31 09:50:13 -050036#define CONFIG_PCIE3
Kumar Galae38209e2011-02-09 02:00:08 +000037#define CONFIG_PCIE4
Kumar Gala9d8e8132011-09-10 10:44:13 -050038#define CONFIG_SYS_FSL_RAID_ENGINE
Kumar Gala4eb3c372011-10-14 13:28:52 -050039#define CONFIG_SYS_DPAA_RMAN
Kumar Galae38209e2011-02-09 02:00:08 +000040
Timur Tabi830b76f2012-10-05 09:48:53 +000041#define CONFIG_SYS_SRIO
42#define CONFIG_SRIO1 /* SRIO port 1 */
43#define CONFIG_SRIO2 /* SRIO port 2 */
Liu Gang27afb9c2013-05-07 16:30:46 +080044#define CONFIG_SRIO_PCIE_BOOT_MASTER
Kumar Galae38209e2011-02-09 02:00:08 +000045#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
46
47#include "corenet_ds.h"