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Daniel Hellstrom73caf572008-03-28 10:20:43 +01001/* Configuration header file for LEON2 GRSIM.
2 *
3 * (C) Copyright 2003-2005
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Francois Retief9e51aea2015-11-21 13:25:41 +02006 * (C) Copyright 2007, 2015
7 * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
Daniel Hellstrom73caf572008-03-28 10:20:43 +01008 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom73caf572008-03-28 10:20:43 +010010 */
11
12#ifndef __CONFIG_H__
13#define __CONFIG_H__
14
15/*
16 * High Level Configuration Options
17 * (easy to change)
18 *
19 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
20 *
21 * TSIM command
22 * tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
23 *
24 */
25
Daniel Hellstrom73caf572008-03-28 10:20:43 +010026#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
27#define CONFIG_TSIM 1 /* ... running on TSIM */
28
29/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020030#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom73caf572008-03-28 10:20:43 +010031
Daniel Hellstrom73caf572008-03-28 10:20:43 +010032/*
33 * Serial console configuration
34 */
35#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020036#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom73caf572008-03-28 10:20:43 +010037
38/* Partitions */
Daniel Hellstrom73caf572008-03-28 10:20:43 +010039
40/*
41 * Supported commands
42 */
Daniel Hellstrom73caf572008-03-28 10:20:43 +010043#define CONFIG_CMD_DIAG
Siva Durga Prasad Paladuguadc11de2014-03-14 16:35:38 +053044#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstrom73caf572008-03-28 10:20:43 +010045#define CONFIG_CMD_IRQ
Daniel Hellstrom73caf572008-03-28 10:20:43 +010046#define CONFIG_CMD_REGINFO
Daniel Hellstrom73caf572008-03-28 10:20:43 +010047
48/*
49 * Autobooting
50 */
Daniel Hellstrom73caf572008-03-28 10:20:43 +010051
52#define CONFIG_PREBOOT "echo;" \
53 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
54 "echo"
55
56#undef CONFIG_BOOTARGS
Daniel Hellstrom73caf572008-03-28 10:20:43 +010057
58#define CONFIG_EXTRA_ENV_SETTINGS \
59 "netdev=eth0\0" \
60 "nfsargs=setenv bootargs root=/dev/nfs rw " \
61 "nfsroot=${serverip}:${rootpath}\0" \
62 "ramargs=setenv bootargs root=/dev/ram rw\0" \
63 "addip=setenv bootargs ${bootargs} " \
64 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
65 ":${hostname}:${netdev}:off panic=1\0" \
66 "flash_nfs=run nfsargs addip;" \
67 "bootm ${kernel_addr}\0" \
68 "flash_self=run ramargs addip;" \
69 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
70 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
71 "rootpath=/export/roofs\0" \
72 "scratch=40000000\0" \
Mike Frysingerc3c6bf12011-10-12 19:47:51 +000073 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom73caf572008-03-28 10:20:43 +010074 "bootargs=console=ttyS0,38400" \
75 ""
76#define CONFIG_NETMASK 255.255.255.0
77#define CONFIG_GATEWAYIP 192.168.0.1
78#define CONFIG_SERVERIP 192.168.0.81
79#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger257ff782011-10-13 13:03:47 +000080#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom73caf572008-03-28 10:20:43 +010081#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergere4da2482011-10-13 13:03:48 +000082#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom73caf572008-03-28 10:20:43 +010083
84#define CONFIG_BOOTCOMMAND "run flash_self"
85
86/* Memory MAP
87 *
88 * Flash:
89 * |--------------------------------|
90 * | 0x00000000 Text & Data & BSS | *
91 * | for Monitor | *
92 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
93 * | UNUSED / Growth | * 256kb
94 * |--------------------------------|
95 * | 0x00050000 Base custom area | *
96 * | kernel / FS | *
97 * | | * Rest of Flash
98 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
99 * | END-0x00008000 Environment | * 32kb
100 * |--------------------------------|
101 *
102 *
103 *
104 * Main Memory:
105 * |--------------------------------|
106 * | UNUSED / scratch area |
107 * | |
108 * | |
109 * | |
110 * | |
111 * |--------------------------------|
112 * | Monitor .Text / .DATA / .BSS | * 256kb
113 * | Relocated! | *
114 * |--------------------------------|
115 * | Monitor Malloc | * 128kb (contains relocated environment)
116 * |--------------------------------|
117 * | Monitor/kernel STACK | * 64kb
118 * |--------------------------------|
119 * | Page Table for MMU systems | * 2k
120 * |--------------------------------|
121 * | PROM Code accessed from Linux | * 6kb-128b
122 * |--------------------------------|
123 * | Global data (avail from kernel)| * 128b
124 * |--------------------------------|
125 *
126 */
127
128/*
129 * Flash configuration (8,16 or 32 MB)
130 * TEXT base always at 0xFFF00000
131 * ENV_ADDR always at 0xFFF40000
132 * FLASH_BASE at 0xFC000000 for 64 MB
133 * 0xFE000000 for 32 MB
134 * 0xFF000000 for 16 MB
135 * 0xFF800000 for 8 MB
136 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200137#define CONFIG_SYS_NO_FLASH 1
138#define CONFIG_SYS_FLASH_BASE 0x00000000
139#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200140#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100141
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200142#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100143
144#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200145#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
146#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100147
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200148#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
149#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
150#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
151#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100152
153#ifdef ENABLE_FLASH_SUPPORT
154/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200155#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100156
157#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
158
159/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200160#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200161#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200162#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100163#endif
164
165/*
166 * Environment settings
167 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200168#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200169/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200170/*#define CONFIG_ENV_SIZE 0x8000*/
171#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100172#define CONFIG_ENV_OVERWRITE 1
173
174/*
175 * Memory map
176 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200177#define CONFIG_SYS_SDRAM_BASE 0x40000000
178#define CONFIG_SYS_SDRAM_SIZE 0x00800000
179#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100180
181/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200182#undef CONFIG_SYS_SRAM_BASE
183#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100184
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100185/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
187#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
188#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100189
Wolfgang Denk0191e472010-10-26 14:34:52 +0200190#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100191
Wolfgang Denk0191e472010-10-26 14:34:52 +0200192#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200193#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100194
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200195#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
196#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100197
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200198#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200199#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
200# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100201#endif
202
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200203#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
204#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
205#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100206
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200207#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
208#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100209
210/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200211#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
212#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100213
214/* make un relocated address from relocated address */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200215#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100216
217/*
218 * Ethernet configuration
219 */
220/*#define CONFIG_GRETH 1*/
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100221
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100222/*
223 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
224 */
225/* #define CONFIG_GRETH_10MBIT 1 */
226#define CONFIG_PHY_ADDR 0x00
227
228/*
229 * Miscellaneous configurable options
230 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200231#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100232#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200233#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100234#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200235#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100236#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200237#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
238#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
239#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100240
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200241#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
242#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100243
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200244#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100245
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100246/***** Gaisler GRLIB IP-Cores Config ********/
247
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200248#define CONFIG_SYS_GRLIB_SDRAM 0
249#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100250#if CONFIG_GRSIM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200251#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100252#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200253#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100254#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200255#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100256
257/*** LEON2 UART 1 ***/
Wolfgang Denk35f734f2008-04-13 09:59:26 -0700258
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100259/* UART1 Define to 1 or 0 */
260#define LEON2_UART1_LOOPBACK_ENABLE 0
261#define LEON2_UART1_FLOWCTRL_ENABLE 0
262#define LEON2_UART1_PARITY_ENABLE 0
263#define LEON2_UART1_ODDPAR_ENABLE 0
264
265/*** LEON2 UART 2 ***/
266
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100267/* UART2 Define to 1 or 0 */
268#define LEON2_UART2_LOOPBACK_ENABLE 0
269#define LEON2_UART2_FLOWCTRL_ENABLE 0
270#define LEON2_UART2_PARITY_ENABLE 0
271#define LEON2_UART2_ODDPAR_ENABLE 0
272
273#define LEON_CONSOLE_UART1 1
274#define LEON_CONSOLE_UART2 2
275
276/* Use UART2 as console */
277#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1
278
279/* LEON2 I/O Port */
280/*#define LEON2_IO_PORT_DIR 0x0000aa00*/
281
282/* default kernel command line */
283#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
284
Daniel Hellstrom73caf572008-03-28 10:20:43 +0100285#endif /* __CONFIG_H */