| Simon Glass | 9893180 | 2020-09-22 12:44:52 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2019 Intel Corporation. |
| 4 | * |
| 5 | * Taken from coreboot intelblocks/nvs.h |
| 6 | * Copyright 2019 Google LLC |
| 7 | */ |
| 8 | |
| 9 | #ifndef _INTEL_GNVS_H_ |
| 10 | #define _INTEL_GNVS_H_ |
| 11 | |
| Simon Glass | 279672f | 2020-11-04 09:57:34 -0700 | [diff] [blame^] | 12 | /* |
| 13 | * The chromeos_acpi portion of ACPI GNVS is assumed to live from offset |
| 14 | * 0x100 - 0x1000. When defining acpi_global_nvs, use check_member |
| 15 | * to ensure that it is properly aligned: |
| 16 | * |
| 17 | * check_member(acpi_global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); |
| 18 | */ |
| 19 | #define GNVS_CHROMEOS_ACPI_OFFSET 0x100 |
| 20 | |
| 21 | enum { |
| 22 | CHSW_RECOVERY_X86 = BIT(1), |
| 23 | CHSW_RECOVERY_EC = BIT(2), |
| 24 | CHSW_DEVELOPER_SWITCH = BIT(5), |
| 25 | CHSW_FIRMWARE_WP = BIT(9), |
| 26 | }; |
| 27 | |
| 28 | enum { |
| 29 | FIRMWARE_TYPE_AUTO_DETECT = -1, |
| 30 | FIRMWARE_TYPE_RECOVERY = 0, |
| 31 | FIRMWARE_TYPE_NORMAL = 1, |
| 32 | FIRMWARE_TYPE_DEVELOPER = 2, |
| 33 | FIRMWARE_TYPE_NETBOOT = 3, |
| 34 | FIRMWARE_TYPE_LEGACY = 4, |
| 35 | }; |
| 36 | |
| 37 | struct __packed chromeos_acpi_gnvs { |
| 38 | /* ChromeOS-specific */ |
| 39 | u32 boot_reason; /* 00 boot reason */ |
| 40 | u32 active_main_fw; /* 04 (0=recovery, 1=A, 2=B) */ |
| 41 | u32 activeec_fw; /* 08 (0=RO, 1=RW) */ |
| 42 | u16 switches; /* 0c CHSW */ |
| 43 | u8 vbt4[256]; /* 0e HWID */ |
| 44 | u8 vbt5[64]; /* 10e FWID */ |
| 45 | u8 vbt6[64]; /* 14e FRID - 275 */ |
| 46 | u32 main_fw_type; /* 18e (2 = developer mode) */ |
| 47 | u32 vbt8; /* 192 recovery reason */ |
| 48 | u32 vbt9; /* 196 fmap base address */ |
| 49 | u8 vdat[3072]; /* 19a VDAT space filled by verified boot */ |
| 50 | u32 vbt10; /* d9a smbios bios version */ |
| 51 | u32 mehh[8]; /* d9e management engine hash */ |
| 52 | u32 ramoops_base; /* dbe ramoops base address */ |
| 53 | u32 ramoops_len; /* dc2 ramoops length */ |
| 54 | u32 vpd_ro_base; /* dc6 pointer to RO_VPD */ |
| 55 | u32 vpd_ro_size; /* dca size of RO_VPD */ |
| 56 | u32 vpd_rw_base; /* dce pointer to RW_VPD */ |
| 57 | u32 vpd_rw_size; /* dd2 size of RW_VPD */ |
| 58 | u8 pad[298]; /* dd6-eff */ |
| 59 | }; |
| 60 | |
| Simon Glass | 9893180 | 2020-09-22 12:44:52 -0600 | [diff] [blame] | 61 | struct __packed acpi_global_nvs { |
| 62 | /* Miscellaneous */ |
| 63 | u8 pcnt; /* 0x00 - Processor Count */ |
| 64 | u8 ppcm; /* 0x01 - Max PPC State */ |
| 65 | u8 lids; /* 0x02 - LID State */ |
| 66 | u8 pwrs; /* 0x03 - AC Power State */ |
| 67 | u8 dpte; /* 0x04 - Enable DPTF */ |
| 68 | u32 cbmc; /* 0x05 - 0x08 - coreboot Memory Console */ |
| 69 | u64 pm1i; /* 0x09 - 0x10 - System Wake Source - PM1 Index */ |
| 70 | u64 gpei; /* 0x11 - 0x18 - GPE Wake Source */ |
| 71 | u64 nhla; /* 0x19 - 0x20 - NHLT Address */ |
| 72 | u32 nhll; /* 0x21 - 0x24 - NHLT Length */ |
| 73 | u32 prt0; /* 0x25 - 0x28 - PERST_0 Address */ |
| 74 | u8 scdp; /* 0x29 - SD_CD GPIO portid */ |
| 75 | u8 scdo; /* 0x2a - GPIO pad offset relative to the community */ |
| 76 | u8 uior; /* 0x2b - UART debug controller init on S3 resume */ |
| 77 | u8 ecps; /* 0x2c - SGX Enabled status */ |
| 78 | u64 emna; /* 0x2d - 0x34 EPC base address */ |
| 79 | u64 elng; /* 0x35 - 0x3C EPC Length */ |
| 80 | u8 unused1[0x100 - 0x3d]; /* Pad out to 256 bytes */ |
| 81 | #ifdef CONFIG_CHROMEOS |
| 82 | /* ChromeOS-specific (0x100 - 0xfff) */ |
| Simon Glass | 279672f | 2020-11-04 09:57:34 -0700 | [diff] [blame^] | 83 | struct chromeos_acpi_gnvs chromeos; |
| Simon Glass | 9893180 | 2020-09-22 12:44:52 -0600 | [diff] [blame] | 84 | #else |
| 85 | u8 unused2[0x1000 - 0x100]; /* Pad out to 4096 bytes */ |
| 86 | #endif |
| 87 | }; |
| Simon Glass | 91f2f19 | 2020-09-22 12:44:54 -0600 | [diff] [blame] | 88 | |
| Simon Glass | 9893180 | 2020-09-22 12:44:52 -0600 | [diff] [blame] | 89 | #ifdef CONFIG_CHROMEOS |
| 90 | check_member(acpi_global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); |
| 91 | #endif |
| 92 | |
| 93 | #endif /* _INTEL_GNVS_H_ */ |