Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015 Google, Inc |
| 3 | * Written by Simon Glass <sjg@chromium.org> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
Michal Simek | a0d2802 | 2013-11-21 13:39:02 -0800 | [diff] [blame] | 8 | #ifndef _CLK_H_ |
| 9 | #define _CLK_H_ |
| 10 | |
Simon Glass | 0342bd2 | 2016-01-20 19:43:02 -0700 | [diff] [blame] | 11 | #include <errno.h> |
Masahiro Yamada | 53b2aec | 2016-01-13 13:16:09 +0900 | [diff] [blame] | 12 | #include <linux/types.h> |
| 13 | |
| 14 | struct udevice; |
| 15 | |
Michal Simek | a0d2802 | 2013-11-21 13:39:02 -0800 | [diff] [blame] | 16 | int soc_clk_dump(void); |
| 17 | |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 18 | struct clk_ops { |
| 19 | /** |
| 20 | * get_rate() - Get current clock rate |
| 21 | * |
| 22 | * @dev: Device to check (UCLASS_CLK) |
| 23 | * @return clock rate in Hz, or -ve error code |
| 24 | */ |
| 25 | ulong (*get_rate)(struct udevice *dev); |
| 26 | |
| 27 | /** |
| 28 | * set_rate() - Set current clock rate |
| 29 | * |
| 30 | * @dev: Device to adjust |
| 31 | * @rate: New clock rate in Hz |
| 32 | * @return new rate, or -ve error code |
| 33 | */ |
| 34 | ulong (*set_rate)(struct udevice *dev, ulong rate); |
| 35 | |
| 36 | /** |
Masahiro Yamada | 67c2295 | 2016-01-13 13:16:12 +0900 | [diff] [blame] | 37 | * enable() - Enable the clock for a peripheral |
| 38 | * |
| 39 | * @dev: clock provider |
| 40 | * @periph: Peripheral ID to enable |
| 41 | * @return zero on success, or -ve error code |
| 42 | */ |
| 43 | int (*enable)(struct udevice *dev, int periph); |
| 44 | |
| 45 | /** |
Masahiro Yamada | cd20f58 | 2016-01-13 13:16:08 +0900 | [diff] [blame] | 46 | * get_periph_rate() - Get clock rate for a peripheral |
| 47 | * |
| 48 | * @dev: Device to check (UCLASS_CLK) |
| 49 | * @periph: Peripheral ID to check |
| 50 | * @return clock rate in Hz, or -ve error code |
| 51 | */ |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 52 | ulong (*get_periph_rate)(struct udevice *dev, int periph); |
| 53 | |
| 54 | /** |
Masahiro Yamada | cd20f58 | 2016-01-13 13:16:08 +0900 | [diff] [blame] | 55 | * set_periph_rate() - Set current clock rate for a peripheral |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 56 | * |
| 57 | * @dev: Device to update (UCLASS_CLK) |
Masahiro Yamada | cd20f58 | 2016-01-13 13:16:08 +0900 | [diff] [blame] | 58 | * @periph: Peripheral ID to update |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 59 | * @return new clock rate in Hz, or -ve error code |
| 60 | */ |
| 61 | ulong (*set_periph_rate)(struct udevice *dev, int periph, ulong rate); |
| 62 | }; |
| 63 | |
| 64 | #define clk_get_ops(dev) ((struct clk_ops *)(dev)->driver->ops) |
| 65 | |
| 66 | /** |
| 67 | * clk_get_rate() - Get current clock rate |
| 68 | * |
| 69 | * @dev: Device to check (UCLASS_CLK) |
| 70 | * @return clock rate in Hz, or -ve error code |
| 71 | */ |
| 72 | ulong clk_get_rate(struct udevice *dev); |
| 73 | |
| 74 | /** |
Masahiro Yamada | cd20f58 | 2016-01-13 13:16:08 +0900 | [diff] [blame] | 75 | * clk_set_rate() - Set current clock rate |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 76 | * |
| 77 | * @dev: Device to adjust |
| 78 | * @rate: New clock rate in Hz |
| 79 | * @return new rate, or -ve error code |
| 80 | */ |
| 81 | ulong clk_set_rate(struct udevice *dev, ulong rate); |
| 82 | |
| 83 | /** |
Masahiro Yamada | 67c2295 | 2016-01-13 13:16:12 +0900 | [diff] [blame] | 84 | * clk_enable() - Enable the clock for a peripheral |
| 85 | * |
| 86 | * @dev: clock provider |
| 87 | * @periph: Peripheral ID to enable |
| 88 | * @return zero on success, or -ve error code |
| 89 | */ |
| 90 | int clk_enable(struct udevice *dev, int periph); |
| 91 | |
| 92 | /** |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 93 | * clk_get_periph_rate() - Get current clock rate for a peripheral |
| 94 | * |
| 95 | * @dev: Device to check (UCLASS_CLK) |
| 96 | * @return clock rate in Hz, -ve error code |
| 97 | */ |
| 98 | ulong clk_get_periph_rate(struct udevice *dev, int periph); |
| 99 | |
| 100 | /** |
| 101 | * clk_set_periph_rate() - Set current clock rate for a peripheral |
| 102 | * |
| 103 | * @dev: Device to update (UCLASS_CLK) |
Masahiro Yamada | cd20f58 | 2016-01-13 13:16:08 +0900 | [diff] [blame] | 104 | * @periph: Peripheral ID to update |
Simon Glass | 36ad234 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 105 | * @return new clock rate in Hz, or -ve error code |
| 106 | */ |
| 107 | ulong clk_set_periph_rate(struct udevice *dev, int periph, ulong rate); |
| 108 | |
Simon Glass | 0342bd2 | 2016-01-20 19:43:02 -0700 | [diff] [blame] | 109 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
| 110 | /** |
| 111 | * clk_get_by_index() - look up a clock referenced by a device |
| 112 | * |
| 113 | * Parse a device's 'clocks' list, returning information on the indexed clock, |
| 114 | * ensuring that it is activated. |
| 115 | * |
| 116 | * @dev: Device containing the clock reference |
| 117 | * @index: Clock index to return (0 = first) |
| 118 | * @clk_devp: Returns clock device |
| 119 | * @return: Peripheral ID for the device to control. This is the first |
| 120 | * argument after the clock node phandle. If there is no arguemnt, |
| 121 | * returns 0. Return -ve error code on any error |
| 122 | */ |
| 123 | int clk_get_by_index(struct udevice *dev, int index, struct udevice **clk_devp); |
| 124 | #else |
| 125 | static inline int clk_get_by_index(struct udevice *dev, int index, |
| 126 | struct udevice **clk_devp) |
| 127 | { |
| 128 | return -ENOSYS; |
| 129 | } |
| 130 | #endif |
| 131 | |
Michal Simek | a0d2802 | 2013-11-21 13:39:02 -0800 | [diff] [blame] | 132 | #endif /* _CLK_H_ */ |