blob: 34162a3976fbf1120ece470a4de396376717cfcf [file] [log] [blame]
Giulio Benetti9dba2622020-01-10 15:51:47 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019
4 * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
5 */
6
7#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Giulio Benetti9dba2622020-01-10 15:51:47 +01009#include <asm/io.h>
10#include <asm/armv7_mpu.h>
Giulio Benetti3d1a5732021-05-20 16:10:13 +020011#include <asm/mach-imx/sys_proto.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060012#include <linux/bitops.h>
Giulio Benetti9dba2622020-01-10 15:51:47 +010013
14int arch_cpu_init(void)
15{
16 int i;
17
Giulio Benetti86c4dc32021-05-13 12:18:30 +020018 struct mpu_region_config imxrt_region_config[] = {
Giulio Benetti9dba2622020-01-10 15:51:47 +010019 { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
20 STRONG_ORDER, REGION_4GB },
21 { PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW,
22 O_I_WB_RD_WR_ALLOC, (ffs(PHYS_SDRAM_SIZE) - 2) },
23 { DMAMEM_BASE,
24 REGION_2, XN_DIS, PRIV_RW_USR_RW,
25 STRONG_ORDER, (ffs(DMAMEM_SZ_ALL) - 2) },
26 };
27
28 /*
29 * Configure the memory protection unit (MPU) to allow full access to
30 * the whole 4GB address space.
31 */
32 disable_mpu();
Giulio Benetti86c4dc32021-05-13 12:18:30 +020033 for (i = 0; i < ARRAY_SIZE(imxrt_region_config); i++)
34 mpu_config(&imxrt_region_config[i]);
Giulio Benetti9dba2622020-01-10 15:51:47 +010035 enable_mpu();
36
37 return 0;
38}
Giulio Benetti3d1a5732021-05-20 16:10:13 +020039
40u32 get_cpu_rev(void)
41{
42#if defined(CONFIG_IMXRT1020)
43 return MXC_CPU_IMXRT1020 << 12;
44#elif defined(CONFIG_IMXRT1050)
45 return MXC_CPU_IMXRT1050 << 12;
Jesse Taube9451ffe2022-07-26 01:43:39 -040046#elif defined(CONFIG_IMXRT1170)
47 return MXC_CPU_IMXRT1170 << 12;
Giulio Benetti3d1a5732021-05-20 16:10:13 +020048#else
49#error This IMXRT SoC is not supported
50#endif
51}