Giulio Benetti | 9dba262 | 2020-01-10 15:51:47 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019 |
| 4 | * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 8 | #include <init.h> |
Giulio Benetti | 9dba262 | 2020-01-10 15:51:47 +0100 | [diff] [blame] | 9 | #include <asm/io.h> |
| 10 | #include <asm/armv7_mpu.h> |
Giulio Benetti | 3d1a573 | 2021-05-20 16:10:13 +0200 | [diff] [blame] | 11 | #include <asm/mach-imx/sys_proto.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 12 | #include <linux/bitops.h> |
Giulio Benetti | 9dba262 | 2020-01-10 15:51:47 +0100 | [diff] [blame] | 13 | |
| 14 | int arch_cpu_init(void) |
| 15 | { |
| 16 | int i; |
| 17 | |
Giulio Benetti | 86c4dc3 | 2021-05-13 12:18:30 +0200 | [diff] [blame] | 18 | struct mpu_region_config imxrt_region_config[] = { |
Giulio Benetti | 9dba262 | 2020-01-10 15:51:47 +0100 | [diff] [blame] | 19 | { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, |
| 20 | STRONG_ORDER, REGION_4GB }, |
| 21 | { PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW, |
| 22 | O_I_WB_RD_WR_ALLOC, (ffs(PHYS_SDRAM_SIZE) - 2) }, |
| 23 | { DMAMEM_BASE, |
| 24 | REGION_2, XN_DIS, PRIV_RW_USR_RW, |
| 25 | STRONG_ORDER, (ffs(DMAMEM_SZ_ALL) - 2) }, |
| 26 | }; |
| 27 | |
| 28 | /* |
| 29 | * Configure the memory protection unit (MPU) to allow full access to |
| 30 | * the whole 4GB address space. |
| 31 | */ |
| 32 | disable_mpu(); |
Giulio Benetti | 86c4dc3 | 2021-05-13 12:18:30 +0200 | [diff] [blame] | 33 | for (i = 0; i < ARRAY_SIZE(imxrt_region_config); i++) |
| 34 | mpu_config(&imxrt_region_config[i]); |
Giulio Benetti | 9dba262 | 2020-01-10 15:51:47 +0100 | [diff] [blame] | 35 | enable_mpu(); |
| 36 | |
| 37 | return 0; |
| 38 | } |
Giulio Benetti | 3d1a573 | 2021-05-20 16:10:13 +0200 | [diff] [blame] | 39 | |
| 40 | u32 get_cpu_rev(void) |
| 41 | { |
| 42 | #if defined(CONFIG_IMXRT1020) |
| 43 | return MXC_CPU_IMXRT1020 << 12; |
| 44 | #elif defined(CONFIG_IMXRT1050) |
| 45 | return MXC_CPU_IMXRT1050 << 12; |
Jesse Taube | 9451ffe | 2022-07-26 01:43:39 -0400 | [diff] [blame] | 46 | #elif defined(CONFIG_IMXRT1170) |
| 47 | return MXC_CPU_IMXRT1170 << 12; |
Giulio Benetti | 3d1a573 | 2021-05-20 16:10:13 +0200 | [diff] [blame] | 48 | #else |
| 49 | #error This IMXRT SoC is not supported |
| 50 | #endif |
| 51 | } |