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Philipp Tomsich3093d202017-03-28 18:48:51 +02001/*
2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
3 *
Philipp Tomsiche219c962017-04-07 19:09:37 +02004 * SPDX-License-Identifier: GPL-2.0+ X11
Philipp Tomsich3093d202017-03-28 18:48:51 +02005 */
6
7/dts-v1/;
8#include <dt-bindings/pwm/pwm.h>
9#include "rk3399.dtsi"
Philipp Tomsichbb5feed2017-04-17 17:50:38 +020010#include "rk3399-sdram-ddr3-1600.dtsi"
Philipp Tomsich3093d202017-03-28 18:48:51 +020011
12/ {
13 model = "Theobroma Systems RK3399-Q7 SoM";
14 compatible = "tsd,puma", "rockchip,rk3399";
15
Philipp Tomsichbb5feed2017-04-17 17:50:38 +020016 config {
17 u-boot,spl-payload-offset = <204800>;
18 };
19
Philipp Tomsich3093d202017-03-28 18:48:51 +020020 chosen {
21 stdout-path = "serial0:115200n8";
22 u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc;
23 };
24
25 aliases {
26 spi0 = &spi1;
27 spi1 = &spi5;
28 };
29
30 vdd_center: vdd-center {
31 compatible = "pwm-regulator";
32 pwms = <&pwm3 0 25000 0>;
33 regulator-name = "vdd_center";
34 regulator-min-microvolt = <800000>;
35 regulator-max-microvolt = <1400000>;
36 regulator-init-microvolt = <950000>;
37 regulator-always-on;
38 regulator-boot-on;
39 status = "okay";
40 };
41
42 vcc3v3_sys: vcc3v3-sys {
43 compatible = "regulator-fixed";
44 regulator-name = "vcc3v3_sys";
45 regulator-always-on;
46 regulator-boot-on;
47 regulator-min-microvolt = <3300000>;
48 regulator-max-microvolt = <3300000>;
49 };
50
51 vcc_phy: vcc-phy-regulator {
52 compatible = "regulator-fixed";
53 regulator-name = "vcc_phy";
54 regulator-always-on;
55 regulator-boot-on;
56 };
57
58 vcc5v0_host: vcc5v0-host-en {
59 compatible = "regulator-fixed";
60 regulator-name = "vcc5v0_host";
61 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
62 };
63
64 clkin_gmac: external-gmac-clock {
65 compatible = "fixed-clock";
66 clock-frequency = <125000000>;
67 clock-output-names = "clkin_gmac";
68 #clock-cells = <0>;
69 };
70
71 vcc_phy: vcc-phy-regulator {
72 compatible = "regulator-fixed";
73 regulator-name = "vcc_phy";
74 regulator-always-on;
75 regulator-boot-on;
76 };
77};
78
79&emmc_phy {
80 status = "okay";
81};
82
83&pwm0 {
84 status = "okay";
85};
86
87&pwm2 {
88 status = "okay";
89};
90
91&pwm3 {
92 status = "okay";
93};
94
95&sdmmc {
96 u-boot,dm-pre-reloc;
97 bus-width = <4>;
Philipp Tomsich3093d202017-03-28 18:48:51 +020098 status = "okay";
99};
100
101&sdhci {
102 bus-width = <8>;
103 mmc-hs400-1_8v;
104 mmc-hs400-enhanced-strobe;
105 non-removable;
106 status = "okay";
107};
108
109&uart0 {
110 status = "okay";
111};
112
113&uart2 {
114 status = "okay";
115};
116
117&usb_host0_ehci {
118 status = "okay";
119};
120
121&usb_host0_ohci {
122 status = "okay";
123};
124
125&dwc3_typec0 {
126 status = "okay";
127};
128
129&usb_host1_ehci {
130 status = "okay";
131};
132
133&usb_host1_ohci {
134 status = "okay";
135};
136
137&dwc3_typec1 {
138 status = "okay";
139};
140
141&pinctrl {
142 pmic {
143 pmic_int_l: pmic-int-l {
144 rockchip,pins =
145 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
146 };
147
148 pmic_dvs2: pmic-dvs2 {
149 rockchip,pins =
150 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
151 };
152 };
153};
154
155&gmac {
156 phy-supply = <&vcc_phy>;
157 phy-mode = "rgmii";
158 clock_in_out = "input";
159 snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
160 snps,reset-active-low;
161 snps,reset-delays-us = <0 10000 50000>;
162 assigned-clocks = <&cru SCLK_RMII_SRC>;
163 assigned-clock-parents = <&clkin_gmac>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&rgmii_pins>;
166 tx_delay = <0x10>;
167 rx_delay = <0x10>;
168 status = "okay";
169};
170
171&spi1 {
172 u-boot,dm-pre-reloc;
173
174 status = "okay";
175
176 #address-cells = <1>;
177 #size-cells = <0>;
178
179 spiflash: w25q32dw@0 {
180 u-boot,dm-pre-reloc;
181
182 compatible = "spi-flash";
183 reg = <0>;
184 spi-max-frequency = <5000000>;
185 spi-cpol;
186 spi-cpha;
187 };
188};
189
190&spi5 {
191 status = "okay";
192};